Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Give TTL- CMOS interfacing
5 M
1 (b) Compare combinational circuit with sequential circuit
5 M
1 (c) Compare binary code with BCD code. Give the example
5 M
1 (d) Compare synchronous with asynchronous counter
5 M

2 (a) Using Quine McClusky technique, minimize the following function :-
F(A,B,C,D) =?m(3,4,5,7,9,13,14,15)
10 M
2 (b) Design a 2 bit synchronous up/down counter usign T-flops
10 M

3 (a) Implement the following Boolean function using single 4:1 MUX and few logic gates :-
F(A,B,C,D)=?m(0,2,4,5,7,8,9,11,14)
10 M
3 (b) Compare the various logic families with respect to their characteristics. Give at least five points with their practical values
10 M

4 (a) Draw and explain the working of Universal Shift Register
10 M
4 (b) Design a circuit to compare two-2 bit numbers. Implement this circuit using only NOR gate
10 M

5 (a) Using one's and two compliment methods perform (52)10-(18)10
5 M
5 (b) Using Boolean Laws prove that :-
\[AB\bar{C}+A\bar{B}C+\bar{A}BC+ABC=AB+BC+CA\]
5 M
5 (c) Design BCD to Excess -3 code converter
10 M

6 (a) Draw a neat circuit of master slave JK flip flop using logic gates. Write its truth table and explain its operation.
10 M
6 (b) Draw a neat circuit of BCD adder and explain its working
10 M

Write short notes on the following :-
7 (a) One bit comparator
7 M
7 (b) FPGA
8 M
7 (c) Fan in and Fan out
5 M



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