STUPIDSID
1 (a)
Compare SRAM and DRAM
5 M
1 (b)
Compare Mealy and Moore machine.
5 M
1 (c)
Compare TTL and CMOS Logic
5 M
1 (d)
Design a full adder using 3:8 decoder.
5 M
2 (a)
State and Prove DeMorgan's Laws.
10 M
2 (b)
Explain carry look ahead adder. What is its advantages over a simple adder.
10 M
3 (a)
Design a 4bit Grey to Binary code converter.
10 M
3 (b)
Implement the given function using 8:1 Multiplexer F(A, B, C, D)=∑(0,1,4,5,6,8,10,12,13).
10 M
4 (a)
Explain the working of Bidirectional Shift register with proper timing diagram.
10 M
4 (b)
Write a VHDL program to design a 1:8 Demux using Data flow modeling.
10 M
5 (a)
Minimize the following expression using Quine McClusky Technique F(A, B, C, D)= ∑m(1,2,5,7,9,15)+d(0,3,11)
10 M
5 (b)
Convert D FF to T FF and SR FF to JK FF.
10 M
6 (a)
Design synchronous counter to count the sequence 0-1-2-3-4-5-0.
10 M
6 (b)
Compare PAL with PLA with suitable examples of logic expressions.
10 M
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