1(a)
State basic theorems of Boolean algebra.

5 M

1(b)
Compare Mealy and Moore machine.

5 M

1(c)
Define Noise Margin,

Propagation delay,

Power Dissipation

Propagation delay,

Power Dissipation

5 M

1(d)
Design a full adder using half adders and logic Gates

5 M

2(a)
Prove that NAND and NOR Gates are universal Gates.

10 M

2(b)
Design a 2-bit comparator and implement using logic Gates.

10 M

3(a)
Design a 4 bit Binary to Grey code converter.

10 M

3(b)
Implement the given function using single 4:1 Multiplexer and few logic gates: F (A,

B,

C,

D) = ∑m(0,

1,

4,

5,

6,

8,

9,

10,

12,

13,

15)

B,

C,

D) = ∑m(0,

1,

4,

5,

6,

8,

9,

10,

12,

13,

15)

10 M

4(a)
What is a universal shift register? Explain its various modes of operations

10 M

4(b)
Write a VDHL program to design a 3:8 Decoder.

10 M

5(a)
Minimize the following expression using Quine MeClusky Technique. F(A,

B,

C,

D) = ∑m(0,

1,

2,

3,

5,

7,

9,

11)

B,

C,

D) = ∑m(0,

1,

2,

3,

5,

7,

9,

11)

10 M

5(b)
Convert JK FF to T FF and JK FF to D FF

10 M

6(a)
Explain the working of 3-bit asynchronous counter with proper timing diagram.

10 M

6(b)
Write a note on CPLDs.

10 M

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