Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Compare combinational logic circuits with sequential circuits.
5 M
1 (b) Compare PLA and PAL.
5 M
1 (c) Explain static RAM.
5 M
1 (d) Explain Master-Slave JK Flip Flop.
5 M

2 (a) State and prove laws of Boolean Algebra.
10 M
2 (b) Using Quine McCluskey method minimize the following
F[A,B,C,D]=πm(0,2,5,7,8,10,12,15).
10 M

3 (a) Implement Full adder using 8:1 multiplexers.
10 M
3 (b) Write VHDL code for 3-bit up counter
10 M

4 (a) Design a two bit digital comparator and implement using basic logic gates.
10 M
4 (b) Draw a neat circuit of BCD adder using IC 7483.
10 M

5 (a) What is universal shift register? Explain any two modes of shift register.
10 M
5 (b) i) Convert a D FF to T FF
ii) Convert a JK FF to T FF
10 M

6 (a) Design a Synchronous counter using T FF for the sequence given below:
1-2-3-4-5-6-7-1
10 M
6 (b) Define the following terms for logic families
i) Propagation Delay
ii) Fan out
iii) Power Description
iv) Noise Margin
v) Fan in
10 M



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