STUPIDSID
1(a)
Compare semi-custom and full-custom design.
5 M
1(b)
Compare buried and butting contact.
5 M
1(c)
Compare ion Implantation and Diffusion.
5 M
1(d)
Draw stick diagram for CMOS inverter.
5 M
2(a)
Explain twin tub process in detail.
10 M
2(b)
What is latch-up in CMOS and How to prevent.
10 M
3(a)
Calculate the threshold voltage VT0 at VSB =0.5 V. For a polyslicon gate n-channel MOS transistor, with the following parameters.
TOX =500Ao , NA=1016 cm-3
ND=2x1020 cm-3
Nox=4x1010 cm-2,br>
TOX =500Ao , NA=1016 cm-3
ND=2x1020 cm-3
Nox=4x1010 cm-2,br>
10 M
3(b)
Explain short channel effect in MOSFET.
10 M
4(a)
Draw the stick diagram and mask layout using ? based design rules for a depletion load NMOS inverter with pullup to pulldown ratio as 4:1.
10 M
4(b)
Explain various sources of power dissipation in digital CMOS circuits.
10 M
5(a)
Explain constant voltage and constant field scaling in detail with their merits.
10 M
5(b)
Write Verilog code fr 1 bit full adder and use it to design a 4 bit full adder.
10 M
6(a)
Implement the following Boolean function In CMOS logic.
Y=CMOS logic/C(D+E)+A.B.
Y=CMOS logic/C(D+E)+A.B.
10 M
6(b)
What is the need for design rules? Justify.
10 M
Write short notes on:
7(a)
Wafer processing:
7 M
7(b)
MOS capacitor:
7 M
7(c)
VLSI design flow:
7 M
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