Solve any one question from Q.1(a,b) &Q.2(a,b)
1(a)
Explain the following:
i) Constants
ii) Varibles
iii) Signals
iv) Functions
v) Procedures
i) Constants
ii) Varibles
iii) Signals
iv) Functions
v) Procedures
10 M
1(b)
Write VHDL code for half adder by structural and behavioral modelling technique.
10 M
2(a)
Describe the PLD design flow.
10 M
2(b)
Write the VHDL programming for D flip-flop and its test bench.
10 M
Solve any one question from Q.3(a,b,c) &Q.4(a,b,c)
3(a)
derive the static and dynamic power dissipitations in CMOS.
7 M
3(b)
Explain the following terms.
i) Clock jitter
ii) Clock skew
i) Clock jitter
ii) Clock skew
4 M
3(c)
Draw and explain CMOS transfer characteristics.
7 M
4(a)
Define Scaling and explain any one type of scaling.
6 M
4(b)
Explain the following:
i) Channel Length Modulation
ii) Body effect
i) Channel Length Modulation
ii) Body effect
4 M
4(c)
Explain the working of a transmission gate and Implement a circuit of 2:1 multiplexer using transmission gate.
8 M
Solve any one question from Q.5(a,b) &Q.6(a,b)
5(a)
Draw and explain active load inverter in detail.
8 M
5(b)
Explain current sink and current source and their characterization with their areas of improvement.
8 M
6(a)
Draw and explain CMOS operational amplifier with voltage gain and output resistance.
8 M
6(b)
Draw the schematic of CMOS differential amplifier and give the expressions for output resistance, CMRR & ICMR.
8 M
Solve any one question from Q.7(a,b) &Q.8(a,b)
7(a)
Explain the fault models with examples.
8 M
7(b)
Explain the need of DFT with suitable example.
8 M
8(a)
Draw the TAP controller state diagram and explain.
10 M
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