Total marks: --
Total time: --
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

Choose the correct answer for the following :-
1 (a) (i) Zener diode can be used for rectification. This statement is ______
(A) True
(B) false
(C) neither true nor false
(D) noe of these
1 M
1 (a) (ii) The maximum efficiency of full wave rectifier is _____
(A) 40.6%
(B) 60.4%
(C) 78.5%
(D) 81.2%
1 M
1 (a) (iii) The knee voltage of a silicon diode is ______
(A) 0.3V
(B) 0.5V
(C) 0.7V
(D) none of these
1 M
1 (a) (iv) If f Hz is the frequency of the input given to a half wave rectifier, the output frequency will be
(A) 2f Hz
(B) f Hz
(C) 3f Hz
(D) 0.5f Hz
1 M
1 (b) Draw and explain the VI-characteristics of a Si-diode and Ge-diode.
6 M
1 (c) With a neat circuit diagram, explain the working principles of full wave bridge rectifier and show that the ripple factor=0.48, and efficiency = 81.2%
10 M

Choose the correct answer for the following :-
2 (a) (i) The current conduction in BJT is because of _____
(A) electrons
(B) holes
(C) both electrons and holes
(D) none of these
1 M
2 (a) (ii) If &alph;=0.95, then the values if ? of transistor is _____
(A) 0.05
(B) 19
(C) 100
(D) 120
1 M
2 (a) (iii) Common collector arrangement is generally used for _____
(A) impedance matching
(B) voltage amplification
(C) current amplifier
(D) none of these
1 M
2 (a) (iv) The current relationship between two current gain in a transistor is _____
\[ (A) \ \beta =\dfrac {\alpha}{1- \alpha} \\(B) \ \beta=\dfrac {1+\alpha }{1-\alpha}\\(C) \ \beta = \dfrac {1-\alpha}{1+\alpha}\\(D) \ \beta = \dfrac {1+\beta}{\beta}\\\]
1 M
2 (b) Draw input and output characteristics of an NPN transistor in common base configuration and explain.
10 M
2 (c) For a Silicon transistor ?dc=0.995, emitter current is 10 mA and leakage current Ico is 0.5?A. Find Ic, IB, &beata; and ICEO.
6 M

Choose the correct answer for the following :-
3 (a) (i) Which of the following factor affects the Q-point stability?
(A) Ico
(B) coupling capacitor
(C) emitter resistor
(D) bypass capacitor
1 M
3 (a) (ii) The inter section of the dc load line with given base current curve is the
(A) h-point
(B) D-point
(C) Q-point
(D) none of these
1 M
3 (a) (iii) For an emitter follower, the voltage gain is ______
(A) unity
(B) greater than unity
(C) less than unity
(D) zero
1 M
3 (a) (iv) The best biasing stability is achieved by using _____ biasing method.
(A) fixed
(B) collectro to base
(C) voltage divider
(D) none of these
1 M
3 (b) Explain the working of collector-to-base bias circuit using an NPN transistor and derive the equation for IB.
8 M
3 (c) Define stability factor and discuss the factor that cuase instability of biasing circuits.
8 M

Choose the correct answer for the following :-
4 (a) (i) FET is a _____ controlled device.
(A) Voltage
(B) Current
(C) Pulse
(D) Power
1 M
4 (a) (ii) PNPN device is an _____
1 M
4 (a) (iii) _____ used as a relaxation oscillator.
1 M
4 (a) (iv) The intrinsic standoff ratio of UJT _____
(A) eqaul to one
(B) must be less than unity
(C) must be greater than unity
(D) must be zero
1 M
4 (b) Explain the working of two transistor model of an SCR and obtain the expression for the anode current.
8 M
4 (c) Draw the equivalent circuit and VI-characteristics of UJT and explain it.
8 M

Choose the correct answer for the following :-
5 (a) (i) Oscillaor uses ______ type of feedback.
(A) positive
(B) negative
(C) reverse
(D) both A and B
1 M
5 (a) (ii) The frequency of osclillators in an oscillator is given by _____
\[ (A) \ \dfrac {1}{2\pi LC}\\(B) \ 2\pi LC \\(C) \ 2\pi\sqrt{LC}\\(D) \dfrac {1}{2\pi \sqrt{LC}}\\\]
1 M
5 (a) (iii) With negative feedback, the bandwidth of an amplifier _____
(A) decreases
(B) increases
(C) both A and B
(D) constant
1 M
5 (a) (iv) ______ times maximum voltage gain.
(A) 0.707
(B) 7.07
(C) 10
(D) 17.06
1 M
5 (b) Draw the frequency repsonse of an RC-coupled amplifier and explain it. Mention its advantages and disadvantages.
8 M
5 (c) Explain with the help of circuit diagram the working of an RC phase shift oscillator using transistor.
6 M
5 (d) In a transistor colpitts oscillator having tank circuit parameters as c1=0.001 ?F and c2=0.01 ?F if L=5?H, calculate the frequency of oscillations.
2 M

Choose the corect answer for the following :-
6 (a) (i) The gain of the voltage follower is ______
(A) zero
(B) infinity
(C) neagative
(D) unity
1 M
6 (a) (ii) Ideally open loop gain of op-amp is _____
(A) 0
(B) 1
(C) ?
(D) positive
1 M
6 (a) (iii) The CMRR is given by _____
(A) Ad × Ac
(B) Ac / Ad
(C) Ad / Ac
(D) none of these
1 M
6 (a) (iv) Maximum rate of charge of output voltage with time is called _____
(B) Slew rate
(C) over rate
(D) none of these
1 M
6 (b) List the characteristics of an ideal-op-amp and draw the three input inverting summer circuit using an op-amp and derive an expression for output voltage.
8 M
6 (c) Draw the basic block diagram of a cathode ray tube and explain its working.
8 M

Choose the correct answer for the following :-
7 (a) (i) Two's compliant of (1001)2 is _____
(A) 1001
(B) 0010
(C) 0111
(D) 1010
1 M
7 (a) (ii) To represent 35 in binary, number of bits required is _____
(A) 6
(B) 5
(C) 4
(D) 33
1 M
7 (a) (iii) Decimal number 37 is represented in BCD by _____
(A) 100111
(B) 00111011
(C) 00110111
(D) 111100
1 M
7 (a) (iv) Over modulation exists when modulation index is _____
(A) 1
(B) 0
(C) >1
(D) <1
1 M
7 (b) Explain the need for modulation.
6 M
7 (c) Convert (A3B)16=( )10 and (247.75)10= ( )2.
4 M
7 (d) (i) Perform (FC02A)16-(D052)16 using 16's complement.
(ii) Subtract (4317.46)8 from (42.345)8 using 8's complement.
6 M

Choose the correct answer for the following :-
8 (a) (i) The expression for half adder carry with input A and B given by _____
(A) A+B
(B) AB
(C) A B
(D) none of these
1 M
8 (a) (ii) The complement of A+B+1 is _____
(A) 0
(B) A+1
(C) AB+1
(D) 1
1 M
8 (a) (iii) ABCD+ABD is equal to _____
1 M
8 (a) (iv) A+(B+C)=(A+B)+C is _____ law.
(A) associative
(B) commutative
(C) distributive
(D) none of these
1 M
8 (b) Design a full adder circuit and realize, using two half adders.
8 M
8 (c) Simplify the following expression and implement using only NAND gates :
\[ (i)\ Y=ABC+A\bar{B}C+AB\bar{C}+\bar{A}BC\\(ii) \ Y=\overline{\overline{AB}+\overline {AC}} \\(iii) \ Y=A+\bar{A}B \]
8 M

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