Choose the correct answer:

1 (a) (i)
When forward-biased, a diode

a) blocks current

b) conducts current

c) has a high resistance

d)drops a large voltage

a) blocks current

b) conducts current

c) has a high resistance

d)drops a large voltage

1 M

1 (a) (ii)
The knee voltage of a Silicon diode is:

a) 0.3V

b) 0.5V

c) 0.7V

d) None of these

a) 0.3V

b) 0.5V

c) 0.7V

d) None of these

1 M

1 (a) (iii)
The ripple factor of half wave rectifier is about?

a) 40.6

b) 0.46

c) 1.21

d) 81.2

a) 40.6

b) 0.46

c) 1.21

d) 81.2

1 M

1 (a) (iv)
The RMS value of a load current in case of a full wave rectifier is:

a) ?/2

b) I

c) I

d) I

a) ?/2

b) I

_{m}/2c) I

_{m}/?2d) I

_{m}/?
1 M

1 (b)
Deduce the following for HWR.

i) I

ii) I

i) I

_{rms}ii) I

_{DC}
4 M

1 (c)
With a neat circuit diagram, explain the working principles of a full wave bridge rectifier.

6 M

1 (d)
Draw the circuit of full wave rectifier and show that the ripple factor=0.48 and efficiency=81%.

6 M

Choose the correct answer:

2 (a) (i)
The current relationship between two current gain in a transistor is:

a) ?=?/(1-?)

b) ?=(1+?)/(1-?)

c) ?=(1-?)/(1+?)

d) ?=(?+1)/?

a) ?=?/(1-?)

b) ?=(1+?)/(1-?)

c) ?=(1-?)/(1+?)

d) ?=(?+1)/?

1 M

2 (a) (ii)
The ?

a) current gain

b) voltage gain

c) power gain

d) internal resistance

_{DC}of a transistor is its:a) current gain

b) voltage gain

c) power gain

d) internal resistance

1 M

2 (a) (iii)
In a transistor the current conduction is due to _____ carriers.

a) Majority

b) Minority

c) Both A&B

d) None of these

a) Majority

b) Minority

c) Both A&B

d) None of these

1 M

2 (a) (iv)
In a transistor circuit:

a) I

b) I

c) I

d) I

a) I

_{E }= I_{C}b) I

_{E}> I_{C}c) I

_{E}< I_{C}d) I

_{E}<< I_{C}
1 M

2 (b)
Draw input and output characteristics of an NPN transistor in common base configuration and explain.

8 M

2 (c)
Calculate the value of I

_{C}, I_{E}and ?_{DC}for a transistor with ?=0.99 and I_{B}=110µA.
4 M

2 (d)
Obtain the relationship between '?

_{DC}' and '?_{DC}'.
4 M

Choose the correct answer:

3 (a) (i)
The intersection of a DC load line and the output characteristics of a transistor is called:

a) Q-Point

b) Quiescent point

c) Operating point

d) All of these

a) Q-Point

b) Quiescent point

c) Operating point

d) All of these

1 M

3 (a) (ii)
For an emitter follower, the voltage gain is:

a) Unity

b) Greater than unity

c) Less than unity

d) Zero

a) Unity

b) Greater than unity

c) Less than unity

d) Zero

1 M

3 (a) (iii)
The best biasing stability is achieved by using _____ biasing circuit.

a) Fixed

b) Collector to base

c) Voltage divider

d) None of these

a) Fixed

b) Collector to base

c) Voltage divider

d) None of these

1 M

3 (a) (iv)
In self bias or emitter bias ciruit _____ is connected between emitter and ground.

a) Inductor

b) Transformer

c) Resistor

d) Capacitor

a) Inductor

b) Transformer

c) Resistor

d) Capacitor

1 M

3 (b)
Explain the concept of base bias techniques using NPN transistor.

10 M

3 (c)
Calculate the Q-point values for the circuit of collector to base circuit. Given R

_{B}=100k?, R_{C}=10k?, V_{cc}=12V and ?_{DC}=100.
6 M

Choose the correct answer:

4 (a) (i)
SCR has _____ number of layers.

a) One

b) Two

c) Three

d) Four

a) One

b) Two

c) Three

d) Four

1 M

4 (a) (ii)
The minimum point in VI characteristic of UJT is known as _____ point.

a) Negative

b) Valley

c) Latching

d) Conducting

a) Negative

b) Valley

c) Latching

d) Conducting

1 M

4 (a) (iii)
The FET is a _____ controlled device.

a) Current

b) Voltage

c) Power

d) None of these

a) Current

b) Voltage

c) Power

d) None of these

1 M

4 (a) (iv)
The relaxation oscillator uses:

a) MOSFET

b) SCR

c) BJT

d) UJT

a) MOSFET

b) SCR

c) BJT

d) UJT

1 M

4 (b)
Draw the two transistor equivalent circuit of SCR. Also plot V-I characteristics and explain various regions of operations.

10 M

4 (c)
Explain with suitable diagram and waveform how UJT can be used as a relaxation oscillator.

6 M

Choose the correct answer:

5 (a) (i)
Oscillator uses _____ type of feedback.

a) Positive

b) Negative

c) Both A&B

d) None of these

a) Positive

b) Negative

c) Both A&B

d) None of these

1 M

5 (a) (ii)
A phase shift oscillator has:

a) Three RC circuits

b) Three LC circuits

c) T-type circuit

d) ?-type circuit

a) Three RC circuits

b) Three LC circuits

c) T-type circuit

d) ?-type circuit

1 M

5 (a) (iii)
The frequency of a Hartley oscillator is f= _____

a) 1/2??(LC)

b) 1/2??(RC)

c) 1/2??C

d) 1/2?LC

a) 1/2??(LC)

b) 1/2??(RC)

c) 1/2??C

d) 1/2?LC

1 M

5 (a) (iv)
The upper and lower critical frequencies are sometimes called the

a) Power frequencies

b) Half power frequencies

c) 6 dB points

d) None of these

a) Power frequencies

b) Half power frequencies

c) 6 dB points

d) None of these

1 M

5 (b)
Explain with a neat diagram, the working of a single stage RC couple amplifiers with its frequency response.

8 M

5 (c)
Give any four advantages of negative feedback in an amplifier.

4 M

5 (d)
In a Colpitt's oscillator, if the desired frequency is 800 kHz, determine values of L and C

_{eq}if C_{1}=C_{2}=10pF.
4 M

Choose the correct answer:

6 (a) (i)
The CMRR is given by _____

a) A

b) A

c) A

d) 20 log A

a) A

_{d}×A_{c}b) A

_{c}/ A_{d}c) A

_{d}/ A_{c}d) 20 log A

_{c}/ A_{d}
1 M

6 (a) (ii)
The gain of the inverting amplifier using R

a) -10

b) -11

c) 10

d) 11

_{f}=10k? and R_{1}= 1k? is _____a) -10

b) -11

c) 10

d) 11

1 M

6 (a) (iii)
The gain of voltage follower is _____

a) Zero

b) Infinite

c)Negative

d) Unity

a) Zero

b) Infinite

c)Negative

d) Unity

1 M

6 (a) (iv)
The screen of CRT is coated with:

a) Chromium

b) Phosphor

c) Carbon

d) Germanium

a) Chromium

b) Phosphor

c) Carbon

d) Germanium

1 M

6 (b)
Calculate the output voltage of a three input summing amplifier:

Given

R

R

R

R

V

V

V

Given

R

_{1}=200k?R

_{2}=250k?R

_{3}=500k?R

_{f}=1M?V

_{1}=-2VV

_{2}=2VV

_{3}=1V.
6 M

6 (c)
Show how an op-amp can be used as an integrator. Derive an expression for output voltage.

6 M

6 (d)
Give any four applications of CRO.

4 M

Choose the correct answer:

7 (a) (i)
The modulating frequency is _____ carrier frequency.

a) lower than

b) higher than

c) equal to

d) none of these

a) lower than

b) higher than

c) equal to

d) none of these

1 M

7 (a) (ii)
The modulation is done in _____

a) Transmitter

b) Receiver

c) None of the above

d)Between transmitter and receiver

a) Transmitter

b) Receiver

c) None of the above

d)Between transmitter and receiver

1 M

7 (a) (iii)
The 2's complement of 1010 gives:

a) 1111

b) 0110

c) 0010

d) 0101

a) 1111

b) 0110

c) 0010

d) 0101

1 M

7 (a) (iv)
In binary numbers, shifting the binary point one place to the right:

a) divides by 2

b) decreases by 10

c) increases by 10

d) multiplies by 2

a) divides by 2

b) decreases by 10

c) increases by 10

d) multiplies by 2

1 M

7 (b)
With suitable block diagram explain function of super heterodyne receiver.

8 M

7 (c)
Convert (ABCD)

_{16}=( )_{2}=( )_{8}=( )_{10}=( )_{BCD}
4 M

7 (d)
Subtract (28)

_{10}-(19)_{10}using both 1's complement and 2's complement methods.
4 M

Choose the correct answer:

8 (a) (i)
When deMorgan's theorem is applied to (A+B)', we get _____

a) A+B

b) A'B'

c) A

d) B

a) A+B

b) A'B'

c) A

d) B

1 M

8 (a) (ii)
Y=A'B+B'A is a Boolean expression for:

a) EX-OR

b) EX-NAND

c) EX-NOR

d) None of these

a) EX-OR

b) EX-NAND

c) EX-NOR

d) None of these

1 M

8 (a) (iii)
The example for universal gate is _____

a) NOT

b) NOR

c) OR

d) AND

a) NOT

b) NOR

c) OR

d) AND

1 M

8 (a) (iv)
The expression for half adder carry 'C' with inputs 'A' and 'B' is given by:

a) A+B

b) AB

c) A'B'

d) None of these

a) A+B

b) AB

c) A'B'

d) None of these

1 M

8 (b)
i) Realize the NAND gate using minimum number of NOR gates.

ii) Simplify M=XYZ + XY'Z+ Z'XY and realize using NOR gates.

ii) Simplify M=XYZ + XY'Z+ Z'XY and realize using NOR gates.

8 M

8 (c)
Realize a full adder using two half adders and an OR gate with truth table.

8 M

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