SPPU Computer Engineering (Semester 4)
Microprocessor and Interfacing Techniques
May 2017
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


Solve any one question from Q.1(a,b,c) &Q.2(a,b,c)
1(a) What is the use of following instructions?
i) Wait
ii) Lock
2 M
1(b) Explain segement address translation in detail.
4 M
1(c) Draw and explain segment descriptor.
6 M

2(a) What is use of Direction Flag?
2 M
2(b) Draw and explain the system address and system segment registers.
4 M
2(c) Explain the following instructions, mention flags affected:
i) CWD
ii) BT
iii) LAHF
6 M

Solve any one question from Q.3(a,b,c) & Q.4(a,b,c)
3(a) List the registers and data structures that are used in multitasking.
2 M
3(b) Differentiate between memory mapped I/O and I/O mapped I/O.
4 M
3(c) Explain what happens when interrupt calls a procedure as an interrupt handler.
6 M

4(a) Write two mechanisms that provide protections for I/O functions.
2 M
4(b) What is IDT and how to locate IDT?
4 M
4(c) Explain the different exception conditions-Faults, Traps and Aborts.
6 M

Solve any one question from Q.5(a,b,c) & Q.6(a,b,c)
5(a) Write short note on "Task Switch Breakpoint".
3 M
5(b) Write short note on " Protection within a V86 task".
4 M
5(c) Explain various debugging features of 80386.
6 M

6(a) Write short note on " General Detect Fault".
3 M
6(b) Which bit of EFLAG is indicates V86 mode? Explain, how hardware and software cooperate with each other to emulate V86 mode?
4 M
6(c) Explain, how test registers are used in testing TLB?
6 M

Solve any one question from Q.7(a,b,c) &Q.8(a,b,c)
7(a) Explain following signals
i) ADS#
ii) READY#
iii) NA#
3 M
7(b) Write note on CLK2 and internal processor clock.
4 M
7(c) Which data types are supported by 80387?
6 M

8(a) Explain following signals
BE0# through BE3#.
3 M
8(b) Explain following signals
i) PEREO
ii) BUSY#
iii) ERROR#
4 M
8(c) Draw read cycle with pipelined address timing.
6 M



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