STUPIDSID
1 (a)
List out the differences between RISC and CISC architecture.
6 M
1 (b)
Discuss the purpose of a Watch dog timer in an embedded application.
6 M
1 (c)
Briefly describe the major elements of the embedded system development life cycle.
8 M
2 (a)
What is meant by the arity of an instruction? Explain the terms one, two, three address instructions.
4 M
2 (b)
What are the four major categories of execution flow through an embedded program? Briefly describe what each means.
8 M
2 (c)
Explain RTN model for a microprocessor Data path and memory Interface with neat diagram.
8 M
3 (a)
Compare SRAM and DRAM.
4 M
3 (b)
Explain the internal diagram of DRAM and write the timing diagram for read and write operation.
8 M
3 (c)
Write a short note on memory Hierarchy.
4 M
3 (d)
Explain associative mapping cache implementation.
4 M
4 (a)
Briefly explain V cycle model and spiral model.
10 M
4 (b)
What are Five steps to a successful design?
4 M
4 (c)
Explain system specifications versus system requirements.
6 M
5 (a)
Explain Task state diagram.
5 M
5 (b)
Differentiate between single thread and multi thread process.
5 M
5 (c)
Explain Task Control Block (TCB)
5 M
5 (d)
What is a Foreground and Background systems?
5 M
6 (a)
What is context switching? Describe the sequence of steps that are necessary to handle an occurrence of an interrupt.
6 M
6 (b)
Explain Three kinds of stack.
6 M
6 (c)
Describe virtual model and high level model for OS architectures.
8 M
7 (a)
Explain Andahl's law.
4 M
7 (b)
Write a 'c' function to determine the sum of the elements in an array and analyze it line by line for its time complexity.
6 M
7 (c)
Explain Big - O notation.
5 M
7 (d)
What are the different operations that can be performed on Arrays and linked list and also analyze the time complexity.
5 M
8 (a)
Explain memory loading with equations and examples.
10 M
8 (b)
Explain the trade tracks to optimize the code for performance improvement.
10 M
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