 MORE IN Digital Logic Design & Analysis
MU Computer Engineering (Semester 3)
Digital Logic Design & Analysis
December 2014
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

1 (a) Represent (29)10 into Excess-3 code and Gray code.
2 M
1 (b) Convert the following hex no. (67.4A)16 into equivalent Octal no.
2 M
1 (c) Convert decimal (215.32) into base '7'.
4 M
1 (d) Convert (670.17)8 into binary and hex.
4 M
1 (e) Add (57)10 and (26)10 in BCD
2 M
1 (f) Explain uses of Gray code.
4 M
1 (g) Add (DDCC)16 and (BBAA)16.
2 M

2 (a) (i) State the boolean algebra laws used in k-map simplification.
(ii) Simplify $Y=ABC(\overline{CD})+ \overline{B}CD+ (\overline{A}\overline{C})(B+D). 10 M 2 (b) A misquided mathematician would like to substract term. AC from both sides of equality. BC+ABD+AC = BC+AC Would they still be equal if he did so. Justify and simplify the expression. \[F= (x+\overline{z}) (\overline{Z+WY})+ (VZ+W\overline{x})(\overline{Y}+ \overline{Z})$
10 M

3 (a) Simplify using boolean theorems and implement usign AOI gate only. $i) \overline {\overline{AB+ \overline A \overline B}+ \overline {(A+B)\cdot (\overline{A}+\overline{B})}}$ ii) Implement the following expression using NAND-NAND logic y=?m(0,1,5)
10 M
3 (b) Simplify using k-map obtain SOP equation and realize using NAND gate. f(A,B,C,D)=ΠM (1,2,3,8,9,10,11,14)+ d(7,15).
10 M

4 (a) Implement the following expression using 8:1 mux
f(A,B,C,D)=πm(0,1,3,5,7,10,11,13,14,15).
4 M
4 (b) Explain with example 4 bit BCD adder using IC-7483.
8 M
4 (c) Compare the performance of ITL, CMOS and ECL logic.
8 M

5 (a) What is shift register? Explain 4 bit bi-directional shift register.
10 M
5 (b) Convert JK FF to SR and DFF.
10 M

Write short note on (any three):
6 (a) State table
7 M
6 (b) VHDL
7 M
6 (c) Difference between CPLD and FPGA
7 M