SPPU Electronics and Telecom Engineering (Semester 3)
Digital Electronics
December 2014
Total marks: --
Total time: --
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

Answer any one question from Q1 and Q2
1 (a) State the following characteristics of Digital IC's (TTL):
(i) Fan in, Fan out
(ii) Noise Margin
(iii) Figure of Merit.
6 M
1 (b) Implement the following functions using single 8 : 1 MUX:
f(A, B, C, D) = πM(0, 3, 5, 7, 12, 15) + d(2, 9).
6 M

2 (a) Draw and explain the working of 2 input CMOS NOR gate.
6 M
2 (b) Design a 2-Bit magnitude comparator using suitable decoder.
6 M

Answer any one question from Q3 and Q4
3 (a) Design a mod-5 ripple counter using a 3-bit ripple counter.
6 M
3 (b) Explain:
(i) State Table
(ii) State Diagram
(iii) State Reduction
6 M

4 (a) Design and explain the following terms:
(i) Mealy Machine
(ii) Moore Machine
(iii) State Table
6 M
4 (b) Design a pulse train generator to generate the following sequence ----10110---- using shift register.
6 M

Answer any one question from Q5 and Q6
5 (a) Give comparison between PROM, PLA and PAL.
5 M
5 (b) A combinational circuit is defined by the following functions. Implement this circuit with PLA having 3 input, 4 product terms and 2 outputs:
F1 (A, B, C) = ∑m(0, 1, 3, 4)
F2 (A, B, C) = ∑m(1, 2, 3, 4, 5).
8 M

6 (a) Explain in detail the architecture of FPGA.
6 M
6 (b) Design a BCD to excess 3 code converter and implement it using PAL.
7 M

Answer any one question from Q7 and Q8
7 (a) Write a VHDL code for 2-bit comparator using behavioural modelling style.
7 M
7 (b) Describe any two modelling styles of VHDL with suitable examples.
6 M

8 (a) Write a VHDL code for 4-bit ALU using case statement.
7 M
8 (b) Explain the following statements with examples:
i) Process
ii) Case
iii) Wait.
6 M

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