Choose the correct answer for the following :-
1 (a) (i)
The knee voltage of a silicon diode is
(A) 0.3V
(B) 0.5V
(C) 0.7V
(D) none of these
(A) 0.3V
(B) 0.5V
(C) 0.7V
(D) none of these
1 M
1 (a) (ii)
The efficiency of full waves rectifier is about _____ %
(A) 40.6
(B) 0.46
(C) 1.21
(D) 81.2
(A) 40.6
(B) 0.46
(C) 1.21
(D) 81.2
1 M
1 (a) (iii)
The missing terms in the forward diode current is IF=I0 [ev/vr-1]
(A) VR
(B) ?
(C) VS
(D) e
(A) VR
(B) ?
(C) VS
(D) e
1 M
1 (a) (iv)
The zener diode is mainly used in
(A) Comparator
(B) Regulator
(C) Multivibrator
(D) None of these
(A) Comparator
(B) Regulator
(C) Multivibrator
(D) None of these
1 M
1 (b)
Discuss the behaviour of p-n junctions under:
(i) No bias
(ii) Forward bias
(iii) Reverse bias.
(i) No bias
(ii) Forward bias
(iii) Reverse bias.
6 M
1 (c)
Explain the operation of full wave bridge rectifire with neat circuit diagram and waveforms.
6 M
1 (d)
A zener diode has a breakdown voltage of 10V. It is supplied from a voltage source varying between 20-40V in series with resistance of 820? using an ideal zener diode model obtain minimum and maximum zener currents.
4 M
Choose the correct answer for the following :-
2 (a) (i)
When transistor operated in cut off and saturation, it acts like
(A) a linear amplifier
(B) a switch
(C) a variable capacitor
(D) a variable resistor
(A) a linear amplifier
(B) a switch
(C) a variable capacitor
(D) a variable resistor
1 M
2 (a) (ii)
If the base emitter junction is open, what is the collector current.
(A) 1 mA
(B) 2 mA
(C) 10 mA
(D) 0
(A) 1 mA
(B) 2 mA
(C) 10 mA
(D) 0
1 M
2 (a) (iii)
The ______ transistor is used for impedance matching.
(A) C-B
(B) C-E
(C) C-C
(D) None of these
(A) C-B
(B) C-E
(C) C-C
(D) None of these
1 M
2 (a) (iv)
? of a transistor is 0.99 calculate ?
(A) ?=0.9
(B) ?=90
(C) ?=99
(D) ?=0.09
(A) ?=0.9
(B) ?=90
(C) ?=99
(D) ?=0.09
1 M
2 (b)
Draw the cammon emitter circuit and sketch the output characteristics, explain active region cutoff region and saturation region by indicating them on the characteristics curve.
8 M
2 (c)
With a neat diagram explain the working of transistor used as voltage amplifier.
4 M
2 (d)
For a certain transistor, 99.6% of the carrier injected into the base cross the collector-base junction. If the leakage current is 5?A and the collectro current is 20mA, calculate:
(i) The value of ?
(ii) The emitter current.
(i) The value of ?
(ii) The emitter current.
4 M
Choose the correct answer for the following :-
3 (a) (i)
The best biasing stability is achieved by using _____ biasing method.
(A) Fixed
(B) Collector to base
(C) Voltage divider
(D) None of these
(A) Fixed
(B) Collector to base
(C) Voltage divider
(D) None of these
1 M
3 (a) (ii)
In self bias or emitter bias circuit _____ is connected between emitter and ground.
(A) Inductor
(B) Capacitor
(C) Resistor
(D) Zener diode
(A) Inductor
(B) Capacitor
(C) Resistor
(D) Zener diode
1 M
3 (a) (iii)
The stability factor is given by
[ (A) dfrac {dI_{infty}}{dI_E}\(B) dfrac {dI_B}{dI_{infty}}\(C) dfrac {dI_E}{dI_{infty}}\(D) dfrac {dI_C}{dI_{infty}}\]
[ (A) dfrac {dI_{infty}}{dI_E}\(B) dfrac {dI_B}{dI_{infty}}\(C) dfrac {dI_E}{dI_{infty}}\(D) dfrac {dI_C}{dI_{infty}}\]
1 M
3 (a) (iv)
The operating point must be _____ for the proper operation transistor
(A) High
(B) Stable
(C) Increasing
(D) Decreasing
(A) High
(B) Stable
(C) Increasing
(D) Decreasing
1 M
3 (b)
With a neat circuit diagram, explain the working of an collector-to-base bias circuit using an npn transistor and derive the equation for IB.
6 M
3 (c)
Determine the operating point for a silicon transistor biased by base bias method with &betal=100, RB=500K?, RC=2.5K? and VCC=20V. Also draw the load line.
6 M
3 (d)
Derive the stability factor S for base bias circuit.
4 M
Choose the correct answer for the following :-
4 (a) (i)
With gate open if the supply voltage exceeds the break over voltage of SCR, then SCR will conduct
(A) False
(B) True
(C) Only for D.C.
(D) Only for A.C.
(A) False
(B) True
(C) Only for D.C.
(D) Only for A.C.
1 M
4 (a) (ii)
The SCR is a _____ device
(A) NPN
(B) PNP
(C) PNPN
(D) PNN
(A) NPN
(B) PNP
(C) PNPN
(D) PNN
1 M
4 (a) (iii)
A relaxation oscillator uses _____
(A) MOSFET
(B) SCR
(C) UJT
(D) BJT
(A) MOSFET
(B) SCR
(C) UJT
(D) BJT
1 M
4 (a) (iv)
FET is a _____ controlled device
(A) Voltage
(B) Current
(C) Power
(D) None of these
(A) Voltage
(B) Current
(C) Power
(D) None of these
1 M
4 (b)
Explain the construction of n-channel JFET and give its symbol.
6 M
4 (c)
Write and explain the equivalent circuit of UJT.
5 M
4 (d)
Explain the two transistor model of SCR.
5 M
Choose the correct answer for the following :-
5 (a) (i)
Oscillator uses _____ type of feedback
(A) Positive
(B) Negative
(C) Reverse
(D) None of these
(A) Positive
(B) Negative
(C) Reverse
(D) None of these
1 M
5 (a) (ii)
The total phase shift around a loop must be _____ for the sutained oscillations.
(A) 180°
(B) 360°
(C) 90°
(D) 270°
(A) 180°
(B) 360°
(C) 90°
(D) 270°
1 M
5 (a) (iii)
The frequency response is a graph of _____
(A) frequency Vs current gain
(B) frequency Vs voltage gain
(C) frequency Vs output voltage
(D) frequency Vs input voltage
(A) frequency Vs current gain
(B) frequency Vs voltage gain
(C) frequency Vs output voltage
(D) frequency Vs input voltage
1 M
5 (a) (iv)
In RC coupled amplifier the d.c. component is blocked by _____
(A) Load reistance RL.
(B) Coupling capacitor, Cc
(C) RB
(D) The transistor
(A) Load reistance RL.
(B) Coupling capacitor, Cc
(C) RB
(D) The transistor
1 M
5 (b)
With a neat circuit diagram, explain the working of a two stage capacitor coupled CE amplifier.
8 M
5 (c)
Explain with the help of circuit diagram the working of an RC phase shift oscillator using transistor.
6 M
5 (d)
Find the frequency of the oscillator of transistorized Colpitts oscillator having tank circuit parameters as C1=15pF, C2=1.5nF and L=50?H.
2 M
6 (a) (i)
In an inverting amplifier there is _____ phase shift between input and output.
(A) 0°
(B) 90°
(C) 180°
(D) 360°
(A) 0°
(B) 90°
(C) 180°
(D) 360°
1 M
6 (a) (ii)
Ideally open loop gain of op-amp is _____
(A) 0
(B) 1
(C) ?
(D) Negative
(A) 0
(B) 1
(C) ?
(D) Negative
1 M
6 (a) (iii)
When op-amp used as integrator with inputs as sqaure wave the output will be
(A) Rampn
(B) Triangular wave
(C) Cosine wave
(D) Step
(A) Rampn
(B) Triangular wave
(C) Cosine wave
(D) Step
1 M
6 (a) (iv)
Lissajous figure are used to measure _____ differece between sinusoidal signals
(A) Phase
(B) Amplitude
(C) Frequency
(D) None of these
(A) Phase
(B) Amplitude
(C) Frequency
(D) None of these
1 M
6 (b)
Write the ideal op-amp characteristics.
6 M
6 (c)
Show with a circuit diagram how an op-amp can be used as differentiator.
6 M
6 (d)
Explain how current measurement is done using CRO.
4 M
Choose the correct answe for the following :-
7 (a) (i)
Which of the following is invalid BCD code?
(A) 0011
(B) 1101
(C) 0101
(D) 1001
(A) 0011
(B) 1101
(C) 0101
(D) 1001
1 M
7 (a) (ii)
Given the number (8BF)16 what is the positional weight of the 8?
(A) 16
(B) 256
? 4096
(D) 8192
(A) 16
(B) 256
? 4096
(D) 8192
1 M
7 (a) (iii)
(64)16-(46)8 in binary is
(A) 111101101
(B) 111101100
(C) 111110
(D) 1100110
(A) 111101101
(B) 111101100
(C) 111110
(D) 1100110
1 M
7 (a) (iv)
The relation between carrier poewer and total power in an AM wave _____
[ (A) P_C=P_Tleft(1+dfrac {m^2}{4} ight )\(B) P_C=P_Tleft(1+dfrac {m^2}{2} ight )\(C) P_T=P_Cleft(1+dfrac {m^2}{4} ight )\(D) P_T=P_Cleft(1+dfrac {m^2}{2} ight )\]
[ (A) P_C=P_Tleft(1+dfrac {m^2}{4} ight )\(B) P_C=P_Tleft(1+dfrac {m^2}{2} ight )\(C) P_T=P_Cleft(1+dfrac {m^2}{4} ight )\(D) P_T=P_Cleft(1+dfrac {m^2}{2} ight )\]
1 M
7 (b)
Determine the value of base x, if (i) (225)x=(341)8; (ii) (211)x=(152)8
6 M
7 (c)
Perform subtraction using 2's complement method 1101 - 1010
4 M
7 (d)
Draw the block diagram of super heterodyne receiver and explain the functions of each block.
6 M
Choose the correct answer for the following :-
8 (a) (i)
De Morgan's therorem states that A+B is
(A) A+ B
(B) A. B
(C) AB
(D) A +B
(A) A+ B
(B) A. B
(C) AB
(D) A +B
1 M
8 (a) (ii)
Universal gates are ______ and ______,
(A) NOT and NOR
(B) AND and OR
(C) NAND and NOR
(D) XOR and XNOR
(A) NOT and NOR
(B) AND and OR
(C) NAND and NOR
(D) XOR and XNOR
1 M
8 (a) (iii)
For which gate when the two inputs A and B are equal the output is zero and otherwise one?
(A) NAND
(B) NOR
(C) EXNOR
(D) EXOR
(A) NAND
(B) NOR
(C) EXNOR
(D) EXOR
1 M
8 (a) (iv)
An half adder has two inputs and _____ outputs
(A) ONE
(B) TWO
(C) THREE
(D) None of these
(A) ONE
(B) TWO
(C) THREE
(D) None of these
1 M
8 (b)
Implement EX-NOR gate using only NOR gates.
4 M
8 (c)
Simplify AB+ AC+A BC(AB+C).
6 M
8 (d)
Implement full adder using two half adders and one OR gate. Write the equations for sum and Cout.
6 M
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