MU Information Technology (Semester 3)
Analog & Digital Circuits
May 2012
Total marks: --
Total time: --
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

1(a) Convert 2435 to base 8 number and 7 number
4 M
1(b) Perform the following operations:
(i) F8F16 + D4916
(ii) 672BCD + 238BCD
6 M
1(c) Explain conversion of SR flip flop to JK flip-flop.
5 M
1(d) With the help of suitable example, explain how hamming code is able to locate and correct single bit error.
5 M

Reduce the following function using:
2(a) Implement one digit BCD adder using IC 7483.Explain its working. Expand your design to implement 4 Digit BCD.
10 M
2(b) Implement 2bit comparator using Active low decoder.
10 M

3(a) Implement 4bit Asynchronous up counter. Also sketch timing diagram.
10 M
3(b) Explain bidirectional shift register with suitable diagram?
10 M

4(a) Design mod-12 synchronous up counter using JK flip-flop and NAND gates only. Design the counter as lock out free counter.
12 M
4(b) VHDL script for 3:8 decoder.
8 M

5(a) Draw the circuit diagram of TTL NAND gate and explain its operations.
10 M
5(b) Implement full adder using 2 4-bit Multiplier and additional gates.
10 M

6(a) Implement Quine McCluskey Minimization technique with an example.
10 M
6(b) Implement BCD to Excess 3 code converter using NOR gates only.
10 M

Write short notes on any two of the following:-
7(a) CAD Tools
10 M
7(b) Race around condition and its remedy in master Slave JK flip flop
10 M
7(c) Programmable Logic Device
10 M
7(d) Priority Encoder
10 M

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