MU Information Technology (Semester 3)
Analog & Digital Circuits
December 2012
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1(a) Explain NAND gate as a Universal logic gate.
4 M
1(b) Convert the following binary numbers to Decimal, Hexadecimal and Octal form.
(i) (101101.1101)2
(ii) (11011011.100101)2
6 M
1(c) Encode the binary word 1011 into seven bit even parity Hamming code
4 M
1(d) State and explain D-Morgan's theorem
6 M

Reduce the following function using:
2(a)(i) Reduce the following using Karnaugh map technique and implement using basic gates
6 M
2(a)(ii) Minimize the expression using K Map technique.
4 M
2(b) Simplify the Boolean function by using Quine-McCluskey method
F(A,B,C,D) = ?m(0,2,3,6,7,8,10,12,13)
10 M

3(a) Implement the following Boolean function using 8:1 multiplexer
8 M
3(b) Design 2-bit comparator using gates.
12 M

4(a) Convert:
(i) SR flip flop to D flip flop
(ii) T flip flop to D flip flop
10 M
4(b) Explain mster slave JK flip flop in detail. How the race around condition is avoided
10 M

5(a) Explain 4 bit bidirectional shift register. What are uses of register ?
10 M
5(b) Design Binary to Grey code converter
10 M

6(a) Explain parity generator and checker
10 M
6(b) Design 3 bit synchronous counter using JK flip flop.
10 M

Write short notes on any two of the following:-
7(a) CAD tools
10 M
7(b) VHDL features
10 M
7(c ) PAL and PLA
10 M
7(d) Mealy and Moore machines
10 M



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