SPPU Computer Engineering (Semester 3)
Microprocessor Architecture
December 2016
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


Solve any one question fromQ.1(a,b,c) and Q.2(a,b,c)
1(a) Describe call gate descriptor.
3 M
1(b) Describe in detail Memory Management Unit of 80386DX.
6 M
1(c) Define segment descriptor.
3 M

2(a) Compare and contrast between 8086 with 80386.
3 M
2(b) Describe in detail descriptor tables and descriptor with suitable diagram representation.
6 M
2(c) Draw 80386 block diagram.
3 M

Solve any one question fromQ.3(a,b,c) and Q.4(a,b,c)
3(a) Describe in detail previlege levels of 80386.
3 M
3(b) Explain in brief linear-to-physical address translation.
5 M
3(c) Draw and explain flag register of 80386.
4 M

4(a) Draw and explain complete bus cycle state diagram.
3 M
4(b) Describe in detail of control, test and debug register of 80386.
5 M
4(c) Contrast beween POPA, PODA.
4 M

Solve any one question fromQ.5(a,b,c) and Q.6(a,b,c)
5(a) Define multicore. List types multicore architectures.
3 M
5(b) What do you, as a designer and developer of software, need to know about moving from sequential programming and single core application development to multicore programming?
6 M
5(c) What are differences between dual and quad core CMP.
4 M

6(a) Enlist features of parallel programming with diagram.
3 M
6(b) Describe with block diagram of "The BUS" connection.
6 M
6(c) Write in brief hyperthreading CMP.
4 M

Solve any one question fromQ.7(a,b,c) and Q.8(a,b,c)
7(a) Explain entering and leaving VM 86 mode in detail.
3 M
7(b) Draw and explain block diagram of 64 bit architecture.
6 M
7(c) Write a short note on virtualization technology.
4 M

8(a) Describe in detail Intel Microarchitecture code name Nehalem.
3 M
8(b) Explain in detail registers in IA 32 architecture.
6 M
8(c) Write short note on SIMD instruction.
4 M



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