STUPIDSID
1 (a)
With a neat diagram, derive the expression for iD in saturation and triode region. What happened to iD if the channel length modulation is considered?
10 M
1 (b)
Draw the large signal equivalent circuit model of NMOS and explain.
4 M
1 (c)
Determine the voltages at all nodes and the currents through all the branches of following circuit, Let Vt=1V and kn'(W/L)=1mA/V2. Neglect the channel-length modulation effect.
6 M
2 (a)
Show the development of the T equivalent - circuit model for the MOSFET from hybrid Π model without channel length modulation.
6 M
2 (b)
Draw the circuit of common-source amplifier with a source resistance. Draw its small signal equivalent circuit with ?0 neglected. Obtain the expression for VB, id, Vo, Av, Avo and the overall voltage gain Gv.
10 M
2 (c)
What is scaling? Differentiate constant field scaling and constant - voltage scaling.
4 M
3 (a)
Briefly explain about short channel effect due to scaling.
6 M
3 (b)
Compare NMOSFET and BJT in terms of
i) Current Voltage characteristics.
iii) High frequency model.
iii) Output resistance.
i) Current Voltage characteristics.
iii) High frequency model.
iii) Output resistance.
6 M
3 (c)
Following figure shoe the high frequency equivalent circuit of a common-source MOSFET amplifier. The amplifier is fed with a signal generator Vsig having a resistance Rsig. Resistance R in is due to the biasing network. Resistance RL is the parallel equivalent of the load resistance RL, the drain bias resistance RD, and the FET output resistance ro. Capacitors Cgs and Cgd are the MOSFET internal capacitance: i) Draw the equivalent circuit at midband frequencies.
ii) Draw the circuit for determine the resistance seen by Cgs.
iii) Draw the circuit for determine the resistance seen by Cgd For Rsig - 100 KΩ Rin=420 kΩ, Cgd=Cgd-1pF, gm-4mA//V, and R'L=3.33 KΩ
iv) Find the mid band voltage gain AM=V0/Vsig.
v) Find the upper 3-dB frequency fH.
ii) Draw the circuit for determine the resistance seen by Cgs.
iii) Draw the circuit for determine the resistance seen by Cgd For Rsig - 100 KΩ Rin=420 kΩ, Cgd=Cgd-1pF, gm-4mA//V, and R'L=3.33 KΩ
iv) Find the mid band voltage gain AM=V0/Vsig.
v) Find the upper 3-dB frequency fH.
8 M
4 (a)
In common gate amplifier with active load, obtain 3-dB frequency fH using open circuit time constants. Draw the circuit required for determining Rgs and Rgd.
8 M
4 (b)
Draw the CD-Cs, CD-CF and CD-Ca configurations.
6 M
4 (c)
Draw an IC source followers circuit. Obtain its small equivalent circuit and obtain its voltage gain \[ A_v = \dfrac {V_0}{V_1} \]
6 M
5 (a)
Obtain common-gate common-made rejection ratio (CMRR) of the MOS differential amplifier. Also find the effect of RD mismatch on CMRR.
12 M
5 (b)
Draw the two-stage CMOS op-amp configuration and briefly explain. Obtain overall dc open-loop gain.
8 M
6 (a)
Briefly explain about
i) Voltage amplifier
ii) Current amplifier
iii) Trans-conductance amplifier
iv) Trans-resistance amplifier.
i) Voltage amplifier
ii) Current amplifier
iii) Trans-conductance amplifier
iv) Trans-resistance amplifier.
8 M
6 (b)
Explain about series-shunt feedback amplifier with diagram and obtain the expression for input impedance and output impedance.
8 M
6 (c)
Briefly explain about stability and pole locations.
4 M
7 (a)
Draw and explain about weighted summer capable of implementing summing coefficients of both signs.
6 M
7 (b)
Explain about DC imperfections.
4 M
7 (c)
Write short note on:
i) Anti-logarithmic amplifiers
ii) Analog multipliers.
i) Anti-logarithmic amplifiers
ii) Analog multipliers.
10 M
8 (a)
Draw the CMOS realization of A01 gate and explain with truth table.
8 M
8 (b)
Draw and explain the exclusive OR functions using PUN and PDN.
8 M
8 (c)
What all are the parameters used to characterize the operation and performance of a logic circuit family.
4 M
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