STUPIDSID
1 (a)
Explain internal RAM memory organization of 8051 microcontroller
5 M
1 (b)
Explain the CPSR register of ARM7 processor.
5 M
1 (c)
Write a program for 8085 processor to convert two digit packed BCD number into unpacked BCD
5 M
1 (d)
Explain the SP(bar)/ EN(bar) pin of 8259 interrupt controller.
5 M
2 (a)
Design and explain two wait state generator circuitry which inserts two wait states in every OPCODE FETCH machine cycle
10 M
2 (b)
Differentiate between I/O mapped I/O and memory mapped I/O.
10 M
3 (a)
Design 8085 based system with following specifications
i) CPU operating at 3 MHz
ii) 16 KB program memory using 4 KB devices
iii) 4 KB data memory using 2 KB devices
iv) One 8 bit input and one 8 bit output port performing interrupt driven I/O data transfer in I/O mapped I/O mode.
Use exhaustive decoding approach. Give detailed I/O map and memory map and neat interfacing diagram
i) CPU operating at 3 MHz
ii) 16 KB program memory using 4 KB devices
iii) 4 KB data memory using 2 KB devices
iv) One 8 bit input and one 8 bit output port performing interrupt driven I/O data transfer in I/O mapped I/O mode.
Use exhaustive decoding approach. Give detailed I/O map and memory map and neat interfacing diagram
10 M
3 (b)
Write 8085 based program to arrange ten data bytes in ascending order. Assume the data array begins from memory address 1000H onwards
10 M
4 (a)
Explain Interrupt Enable and Interrupt Priority registers of 8051 microcontroller
10 M
4 (b)
Explain Interrupt structure of 8085 processor
10 M
5 (a)
Interface 0808 ADC to 8051 microcontroller and write a program to take in analog input connected to input channel 0 and send the converted digital data on LED's connected to P0.
10 M
5 (b)
Explain Timer 0 internal structure in detail.
10 M
6 (a)
Write 8051 based program to generate a delay of 100 msec if controller operates at 12 MHz crystal frequency. Show the delay calculations
10 M
6 (b)
Explain MODE 0 and MODE 1 of 8253 Timer/Counter peripheral IC with the help of timing diagram
10 M
7 (a)
Explain the instructions given below:
(i)ADDS r0, r2, r3
(ii)ADD r0, r0, r0 LSL #1
(iii)TST r0, r3
(iv) MVN r0, r2
(v)ORR r3, r2, # 1 < < 10
(i)ADDS r0, r2, r3
(ii)ADD r0, r0, r0 LSL #1
(iii)TST r0, r3
(iv) MVN r0, r2
(v)ORR r3, r2, # 1 < < 10
10 M
7 (a)
Explain the instructions given below:
(i)ADDS r0, r2, r3
(ii)ADD r0, r0, r0 LSL #1
(iii)TST r0, r3
(iv) MVN r0, r2
(v)ORR r3, r2, # 1 < < 10
(i)ADDS r0, r2, r3
(ii)ADD r0, r0, r0 LSL #1
(iii)TST r0, r3
(iv) MVN r0, r2
(v)ORR r3, r2, # 1 < < 10
10 M
7 (b)
Explain input data transfer using handshake signals of 8255 with the help of timing diagram
10 M
7 (b)
Explain input data transfer using handshake signals of 8255 with the help of timing diagram
10 M
More question papers from Microcontroller and Applications