SPPU Information Technology (Semester 3)
Computer Organization & Architecture
December 2014
Total marks: --
Total time: --
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

Answer any one question from Q1 and Q2
1 (a) Compare IEEE single precision and double precision formats and represent (?16.75)10 in single precision format.
6 M
1 (b) Explain with examples the following addressing modes Of 8086:
(i) Register addressing
(ii) Immediate addressing
(iii) Base Index with displacement addressing.
6 M

2 (a) Multiply the following signed 2?s complement numbers using Booth's algorithm.
6 M
2 (b) Write a note on MAX/MIN mode of microprocessor 8086.
6 M

Answer any one question from Q3 and Q4
3 (a) Draw and explain programmer's model of microprocessor 8086.
6 M
3 (b) Draw and explain single bus organization of CPU. What are its advantages over multiple bus organization?
7 M

4 (a) Explain with suitable examples following instructions of 8086:
(i) ADD
(ii) MUL
(iii) ROL.
6 M
4 (b) Explain with suitable block diagram design of CPU using hard-wired control method.
7 M

Answer any one question from Q5 and Q6
5 (a) Compare direct, set associative and fully associative cache memory mapping techniques.
6 M
5 (b) What is virtual memory ? Explain virtual to physical address translation.
6 M

Write short notes on (any two):
6 (a) EEPROM
6 M
6 (b) RAID
6 M
6 (c) SDRAM
6 M

Answer any one question from Q7 and Q8
7 (a) Explain the techniques for performing IO in brief.
6 M
7 (b) State the explain in brief the use of registers of DMA controller 8237.
7 M

8 (a) Explain the functions and features of 8255 and 8251.
6 M
8 (b) Explain PCI bus with a neat diagram.
7 M

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