STUPIDSID
1 (a)
Write microinstructions for executing instruction Add, Ro, [R3] in there bus architecture processor.
5 M
1 (b)
Write a note on nanoprogramming.
5 M
1 (c)
Differentiate SRAM and DRAM.
5 M
1 (d)
What is parallel processing?
5 M
2 (a)
Draw flowchart for non-restoring division. Solve (8)+(3) using non-restoring division method.
10 M
2 (b)
Differentiate between Horizontal and vertical micro architecture.
10 M
3 (a)
Consider main memory size is three pages. Following page address trace is generated by execution of a program
2 3 2 1 5 2 4 5 3 2
Assume main memory is cleared initially. Find page hit ratio by
i) FIFO ii) LRU replacement scheme.
2 3 2 1 5 2 4 5 3 2
Assume main memory is cleared initially. Find page hit ratio by
i) FIFO ii) LRU replacement scheme.
10 M
3 (b)
What is microprogramming? Draw and explain microprogrammed control unit.
10 M
4 (a)
What is virtual memory? How paging is useful in implementing virtual memory?
10 M
4 (b)
State the advancements in arithmetic and logical instructions supported by IA-32 architecture. Describe five floating point arithmetic instructions in IA-32.
10 M
5 (a)
Explain various DMA transfer modes in brief with examples.
10 M
5 (b)
Explain various types of hazards in pipelined processors with example. Also propose solution for each type.
10 M
6 (a)
What are different I/O access methods? Explain in detail.
10 M
6 (b)
Write short notes on:
i) Cache coherency
ii) RISC and CISC architectures.
i) Cache coherency
ii) RISC and CISC architectures.
10 M
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