MU Computer Engineering (Semester 6)
Advanced Microprocessor
December 2013
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Draw and explain the various instruction format of SPARC processor.
10 M
1 (b) Explain the protection mechanism of X 86 Intel family microprocessor.
10 M

2 (a) Explain segment translation mechanism with flowchart. Also explain segment descriptor.
10 M
2 (b) Explain the Cache Organization of Pentium processor.
10 M

3 (a) Explain dynamic branch prediction logic of Pentium processor.
10 M
3 (b) Explain different stages of integer pipeline and floating point pipeline of Pentium processor.
10 M

Write short notes on:-
4 (a) USB
5 M
4 (b) Data types supported by SPARC
5 M
4 (c) VESA
5 M
4 (d) CALL get Mechanism
5 M

5 (a) Draw the block diagram of 80386DX processor and explain each block in brief.
10 M
5 (b) State the features of PCI bus. Draw a work station based on PCI bus and explain.
10 M

6 (a) Compare Super SPARC and Ultra SPARC processor. Draw and explain in brief the Architecture of Super SPARC.
10 M
6 (b) Explain how the flushing of pipeline is minimize in Pentium architecture. Enlist the instruction pairing rules of U and V pipeline in Pentium.
10 M

7 (a) Explain Intel's net burst micro architecture with diagram.
10 M
7 (b) Explain the Itanium processor with respect to the instruction format, core pipeline stages and the functionality.
10 M



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