MU Computer Engineering (Semester 6)
Advanced Microprocessor
May 2013
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Draw the block diagram of 80386DX processor and explain each block in brief.
10 M
1 (b) Differentiate segmentation in real mode and protected mode.
5 M
1 (c) Discuss the register set of 80386 processor.
5 M

2 (a) What are the different types of instruction Hazards? Explain in detail.
10 M
2 (b) Draw and explain Pentium processor architecture.
10 M

3 (a) Explain dynamic branch prediction logic of Pentium processor.
10 M
3 (b) Explain different stages of integer pipeline and floating point pipeline of Pentium processor.
10 M

4 (a) Compare Super SPARC and Ultra SPARC processor. Draw and explain in brief the Architecture of Super SPARC.
10 M
4 (b) Explain the Itanium processor with respect to the instruction format, core pipeline stages and the functionality.
10 M

5 (a) Explain the Cache Organization of Pentium processor.
10 M
5 (b) Draw and Explain the state diagram of MESI transitions that occur within the Pentium s data cache memory.
10 M

6 (a) Explain EFLAGS bits of Pentium.
10 M
6 (b) State the features of PCI bus. Draw a work station based on PCI bus and explain.
10 M

Write short notes on (any two)
7 (a) Layered architecture of SCSI
10 M
7 (b) USB
10 M
7 (c) VESA
10 M



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