Answer any one question from Q1 and Q2
1 (a)
Explain in brief general classification of multiprocessor based on following techniques.
i) Degree of coupling
ii) Memory access
iii) Flynn?s classification
iv) Feng?s classification
i) Degree of coupling
ii) Memory access
iii) Flynn?s classification
iv) Feng?s classification
12 M
1 (b)
Explain Implicit and Explicit parallelism.
6 M
2 (a)
What is scalable computer system? Explain various parameters affecting scalability of computer system.
10 M
2 (b)
State and explain features of Itanium Architecture for software pipelining support.
8 M
Answer any one question from Q3 and Q4
3 (a)
Design a six bit multiplier using CSA Tree. How it can be viewed as k-stage arithmetic pipeline? With same Hardware how an n-bit multiplier can be designed? Assuming single clock cycle per processing stage, find the total No. of clock cycles for the same.
10 M
3 (b)
Discuss the various features of SPARC Architecture.
6 M
4 (a)
Consider a 4 stage pipeline processor. The number of cycles needed by the four instructions I1, I2, I3, I4 in stages S1, S2, S3, S4 are as shown below
Calculate number of cycles needed to execute the following loop for (i=1 to 2)
{
I1,;
I2;
I3;
I4;
}
Also draw the space time diagram showing execution of all instructions through successive pipeline stages.
S1 | S2 | S3 | S4 | |
I1 | 2 | 1 | 1 | 1 |
I2 | 1 | 3 | 2 | 2 |
I3 | 2 | 1 | 1 | 3 |
I4 | 1 | 2 | 2 | 2 |
Calculate number of cycles needed to execute the following loop for (i=1 to 2)
{
I1,;
I2;
I3;
I4;
}
Also draw the space time diagram showing execution of all instructions through successive pipeline stages.
8 M
4 (b)
Identify All of the RAW, WAR and control Hazards in following instruction sequence.
DN | r2, r5, r8 |
SUB | r9, r2, r7 |
ASH | r5, r14, r6 |
MUL | r11, r9, r5 |
BEQ | r10, #0, r12 |
OR | r8, r15, r2 |
8 M
Answer any one question from Q5 and Q6
5 (a)
With suitable examples, explain the necessity of data Routing in array processors.
8 M
5 (b)
Discuss a problem of 3×3 matrix multiplication on a mesh network. Obtain it's time complexity.
8 M
6 (a)
Explain the programming model of cray-1 vector Architecture.
8 M
6 (b)
What is use of data Routing functions? With examples discuss the necessity of data routing in array processors.
8 M
Answer any one question from Q7 and Q8
7 (a)
Explain following bus arbitration algorithms in brief.
i) RDC
ii) FCFS
iii) Polling
i) RDC
ii) FCFS
iii) Polling
9 M
7 (b)
Discuss COWs and NOW's architecture with suitable block diagrams.
9 M
8 (a)
Explain with typical cluster computing Architecture the various operating system issues to be handled in the design of cluster computing system.
9 M
8 (b)
What are different Multiprocessors Architectures? What are Network and software factors limiting performances of these systems?
9 M
Answer any one question from Q9 and Q10
9 (a)
With suitable examples explain shared memory parallel programming. What is SPMD programming?
8 M
9 (b)
Explain with examples the use of synchronization primitives in parallel programming.
8 M
10 (a)
With standard constructs and features explain how parallelism is achieved in data parallel programming?
8 M
10 (b)
Explain use of following primitives used in parallel programming.
i) Send ( )
ii) Receive ( )
iii) Fork ( )
iv) Join ( )
i) Send ( )
ii) Receive ( )
iii) Fork ( )
iv) Join ( )
8 M
Answer any one question from Q11 and Q12
11 (a)
With suitable example explain how parallel algorithms are written for multiprocessor systems.
8 M
11 (b)
Explain in detail the steps usually followed for generating a multiprocessing application from a sequential application.
8 M
12 (a)
Explain the classification of parallel algorithms with suitable examples.
8 M
12 (b)
How parallel virtual machine acts as a programming interface for parallel processing?
8 M
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