MU Electronics and Telecom Engineering (Semester 5)
Integrated Circuits
December 2013
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Explain current amplifier.
5 M
1 (b) Explain switched capacitor filters
5 M
1 (c) Explain the log amplifier
5 M

2 (a) Draw the block diagram of internal architecture of XC 9500 family CPLD and explain.
10 M
2 (b) Explain basic requirement of instrumention amplifier and find output voltage expression for instrument amplifier using three op-amp
10 M

3 (a) Design astable multivibrator using 555 with output frequency 10 KHz and duty cycle 70%
10 M
3 (b) Explain inverting schmitt trigger and find the expression for the hystersis width for it also mention transfer characteristics
10 M

4 (a) Design IC 566 for frequency 10 KHz. Find change in modulation voltage if frequency is varied from 9 KHz-10KHz
10 M
4 (b) Write the VHDL code for synchronous decade counter with rising clocked edge and asynohronous clear input.
10 M

5 (a) Design a second order KRC highpass filter with cut-off frequency FO=1 kHZ and Q=5 and draw circuit diagram
10 M
5 (b) Explain the servo tracking tupe ADC.
5 M
5 (c) Explain the filter approximations
5 M

6 (a) Explain IC 8038 with internal block. Find the expression for duty cycle of 8038 IC
10 M
6 (b) Design a melay machine for overlap sequence detector for the string 1101. the output must ? when the input matches this string.
(i) Draw the state diagram
(ii) Write its transition and output table
(iii) Draw its logic diagram
10 M

7 (a) Explain antilog amplifier
5 M
7 (b) Explain sample and hold CKT
5 M
7 (c) Explain generalised impedance convertor
5 M
7 (d) Differentiate between static RAM and Dynamic RAM
5 M



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