Answer any one question from Q1 and Q2

1 (a)
Define the following characteristics of practical op-amp:

(i) Input offset voltage

(ii) CMMR

(iii) PSSR

(iv) Slew rate.

(i) Input offset voltage

(ii) CMMR

(iii) PSSR

(iv) Slew rate.

6 M

1 (b)
What is slew rate ? What are its causes ? Derive its expression for maximum frequency of operation for a desire output swing in terms of slew rate.

6 M

2 (a)
Justify, how constant current source is used in place of R

_{E}to improve the CMRR for a differential amplifier.
6 M

2 (b)
What is need for frequency compensation? State and explain Pole?Zero compensation method of frequency compensation.

6 M

Answer any one question from Q3 and Q4

3 (a)
Why basic Integrator is needed to be modified ? Draw the circuit diagram of Practical Integrator along with frequency response and explain its operation.

6 M

3 (b)
List important characteristics of Comparator? What are the advantages of Schmitt trigger over Comparator ?

6 M

4 (a)
Draw circuit diagram of Three op-amp Instrumentation Amplifier and write its output equation.

6 M

4 (b)
Design a Schmitt trigger for U

_{TP}=3V and L_{TP}and L_{TP}=-2V with general purpose op-amp 741. Assume V_{CC}= +/-12V. Draw detailed diagram with designed values.
6 M

Answer any one question from Q5 and Q6

5 (a)
Draw a neat schematic of Voltage Controlled Oscillator (VCO) using Op-amp. Derive the expression for output frequency.

6 M

5 (b)
With the help of a neat block diagram, explain operation of Phase Locked Loop (PLL). Define the term 'Lock Range' and 'Capture Range'

6 M

6 (a)
Explain Voltage to Current Converter with grounded load using Op-amp and give its applications.

6 M

6 (b)
Define 'Lock Range', 'Capture Range' and 'Pull-in time' and explain the transfer characteristics of Phase Locked Loop (PLL).

7 M

Answer any one question from Q7 and Q8

7 (a)
Draw the circuit diagram of voltage mode R-2R ladder Digital to Analog converter (DAC) and explain its working.

7 M

7 (b)
Calculate output frequency 'f

_{0}' Lock range 'Δf_{L}', Capture range 'Δf_{c}', of a PLL if R_{T}=1 kΩ, C_{T}=0.1 μF and filter capacitor C=10 μf. Assume V=20 V.
6 M

8 (a)
Explain successive approximation type ADC with neat block diagram. An 8-bit ADC output all 1's when V

i) Resolution

ii) Digital output, when V

_{i}=5.1 V. Find its:i) Resolution

ii) Digital output, when V

_{i}=1.28 V.
8 M

8 (b)
Explain various power supply performance parameters.

5 M

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