VTU Computer Science (Semester 7)
Embedded Computing Systems
December 2013
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) What is an embedded system? Explain the purpose of ES? List its major application areas and give one example for each?
8 M
1 (b) Differentiate the following, with an example:
i) Microprocessor and microcontroller
ii) Embedded system and general purpose computers.
6 M
1 (c) Write a requirement chart for digital camera?
3 M
1 (d) List challenges of embedded computing system design? Explain briefly any two challenges.
3 M

2 (a) What are the major difference between Von neuman and Hardware architecture?
4 M
2 (b) Explain the following:
i) Restrictions of MUL instruction
ii) Uses of MLA instruction
iii) Register indirect addressing in ARM
iv) Write a ARM assembly code for below C-statement z=(x|22) and (y>>2)
v) Disadvantages of busy-wait IO?
7 M
2 (c) Solve the following:
i) What is the average memory access time of machine whose hit rate is 93% with cache access time of 5ns and main memory access time of 80 ns?
ii) Calculate cache hit rate, if the cache access time is 5 ns, average memory access time is 6.5 ns and memory access time is 80ns?
4 M

3 (a) Explain with neat diagram, the bus with a DMA controller.
5 M
3 (b) Explain the following briefly:
i) Counter
ii) Watchdog timer
iii) Break point
iv) Timer.
4 M
3 (c) Differentiate PCI and USB by their characteristics.
3 M
3 (d) Assume that the bus has a 1 MHz bus clock period, with is 2 bytes per transfer, data transfer itself takes 1 clock cycles, address and handshaking signals before data is 2 clock cycles and sending ACK after data is 1 clock cycles.
i) What is the total transfer time in clock cycles to transfers of total 612000 bytes of data?
ii) What is the total burst mode transfer time in clock cycle, if B=2 byte with 2 byte wide
iii) Calculate the total real time to transfer data.
8 M

4 (a) Consider the following ARM assembly code. Which illustrate some sample C statement.
LDR LDR ADD STR LDR LDR ADD STR LDR ADD STR LDR LDR St.B STR
r0, a r1, b r2, r0-r1 r2, w r0, c r1, d r2, rn, r2 r2, x r1, c r0, r1, r2 r0, u r0, a r1, b r2, r1, r0 r2, z

Answer total following:

i) Write the sample C code fragment for the above ARM assembly code
ii) Draw a lifetime graph that shows uses of register in register allocation for the above C statement
iii) Modify the obtained C code statement using operator scheduling for register allocation
iv) Draw a lifetime graph for the modified 'C' code appear
v) Write a ARM assembly code for the modified 'C' code using register allocation.
10 M
4 (b) Consider the following 'C' code statement
lif (a>b)
x=a+b;
else
x=a-b;
i) Write CDFG for the above 'C' statement
ii) Generate the ARM assembly code for the above 'C' statement.
7 M
4 (c) Explain briefly different types of performance measures on programs.
3 M

5 (a) What is RTOS? Explain with an example the hard real time and soft real time.
6 M
5 (b) Differentiate process and threads. What are the parameters of PCB of a process? Why should each process have a distinct PCB?
8 M
5 (c) What is the significance of spinlock?
2 M
5 (d) What is semaphores? Explain briefly the different types of semaphores?
4 M

6 (a) Explain with neat diagram, the concept of money mapped object.
8 M
6 (b) Explain the following:
i) Message passing
ii) Remote procedure call for IPC
6 M
6 (c) What are the factors need to be evaluated in selection of an RTOS? Explain.
6 M

7 (a) Explain with neat diagram the various fields of IP packet.
8 M
7 (b) List the features of internet LAN.
4 M
7 (c) With neat diagram, explain the various fields of CAN frame.
6 M
7 (d) Briefly explain any two features of HTTP protocols.
2 M

8 (a) Explain the following:
i) Simulator
ii) Target system
iii) Debugging
iv) Logic analyzer
8 M
8 (b) Explain features advantages and limitations of simulators based debugging.
6 M
8 (c) Explain the types of multitasking.
6 M



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