SPPU Electronics and Telecom Engineering (Semester 5)
Digital Signal Processing
December 2015
Total marks: --
Total time: --
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

Solve any one question from Q1 and Q2
1 (a) Explain Advantages of Digital Signal Processing over Analog Signal Processing.
5 M
1 (b) Explain the concept of orthogonality.
2 M
1 (c) Check whether the functions given are orthogonal or not over an time interval [0, 1] f(t)=1; x(t)=√3 (1-2t).
3 M

2 (a) Compute 4-point DFT of sequence x(n)={1231} using DIT-FFT radix x-2 algorithm. What is Computational Complexity of Radix x-2 FFT algorithm?
6 M
2 (b) Compute circular convolution of x1(n)={1,2,3,4} & x2(n)={2,1,2,1}.
4 M

Solve any one question from Q3 and Q4
3 (a) Plot the magnitude and phase spectrum of the sampled data sequence = {2, 0, 0, 1} which was obtained using a sampling frequency of 20 Hz.
5 M
3 (b) Explain linear filtering effect for long duration sequences.
5 M

4 (a) State any four properties of Z-Transform.
4 M
4 (b) Compute Z-Transform and ROC of the following sequence [ x(n) = \left [ \dfrac {-1}{3} \right ]^n u[n] - \left [ \dfrac {1}{3} \right ]^n u[-n -1] ]
6 M

Solve any one question from Q5 and Q6
5 (a) Design a Butterworth filter using impulse invariant method transformation to satisfy the following specifications. [ \begin {align*} &0.707 \le |H(e^{jw})le 1 & for 0\le w \le 0.2 \pi \ &|H(e^{jw})le 0.2 & &for 0.6 \pi \le w \le \pi \end{align*} ]
8 M
5 (b) Explain impulse invariant method for S-plane to Z-plane mapping. Explain its limitations.
8 M

6 (a) What is frequency warping effect? How the mapping is done in bilinear transformation method?
7 M
6 (b) Draw the direct form-I and II structures for the following systems.
i) 3y(n)-2y(n-1)+y(n-2)=4x(n)-3x(n-1)+2x(n-2)
ii) y(n)=0.5 [x(n)+x(n-1)].
9 M

Solve any one question from Q7 and Q8
7 (a) Explain the characteristics of the FIR filters.
8 M
7 (b) Determine the impulse response h(n) of a filter having desired frequency response. [ H_d (e^{jw\omega}) = \left{egin{matrix} e^{-j(N-1)omega} & for \ 0\le | \omega \le \frac {pi}{2} \ 0 & for \ \frac {pi}{2} \le |omega|le \pi \end{matrix} ight. ] N = 7, use windowing technique approach. Use hamming window.
8 M

8 (a) Explain Gibbs phenomenon. Compare between windows available.
8 M
8 (b) Determine the impulse response h (n) of a filter having desired frequency response, [ H_d (e^{jw}) = \left{egin{matrix} e^{-j (N-1)w} & for \ 0 \le |w| \le \frac {pi}{2}\0 & for \ \frac {pi}{2} \le |w| \le \pi \end{matrix} ight. ] N = 7, Use frequency sampling approach.
8 M

Solve any one question from Q9 and Q10
9 (a) What is sampling rate conversion? What is multirate DSP? Why it is Required?
6 M
9 (b) A signal x (n), at a sampling frequency of 2.048 KHz is to be decimated by a factor of 32 to yield a signal at sampling frequency 64Hz. The signal band of interest extends from 0-30 Hz. The anti-aliasing filter should satisfy the following specifications:
Pass Band deviation : 0.01dB
Stop Band deviation : 80dB
Pass Band : 0 - 30Hz
Stop Band : 32 - 64Hz
The signal components in the range from 30 to 32 Hz should be protected from aliasing. Design a suitable one-stage decimator.
8 M
9 (c) How the DSP processors are selected? (any four points)
4 M

10 (a) State four important features of DSP processors.
4 M
10 (b) Draw the architecture of typical DSP processor TMS320C67XX and explain it in short.
6 M
10 (c) 5 Design a two stage decimator that down samples an audio signal by a factor of 30, satisfying the following constraints:
Input sampling frequency : 240 Khz
Highest frequency of interest : 3.4 Khz
Passband ripple : 0.05
Stopband attenuation : 0.01
8 M

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