GTU Computer Engineering (Semester 3)
Digital Electronics
June 2014
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Convert following 1.(4E7.2)16=(?)8. 2.(521.3)8=(?)2
7 M
1 (b) Simplify : 1. A'B+A'BC'+A'BCD+A'BC'D'E
2. (P+Q+R)(P'+Q'+R')P
7 M

2 (a) Write a brief not on Gray codes. Also discuss methods for conversion from gray to binary code and vice versa
7 M
2 (b) Using K-map find the Boolean function and its complement for the following:
F(A,B,C,D)=Σ(1,2,3,4,6,8,9,10,11,12,14).
7 M
2 (c) Derive Boolean function using Tabulation Method for the following:F(P,Q,R,S)=Σ(0,1,3,4,5,7,10,13,14,12).
7 M

3 (a) Explain in brief: Programmable Logic Array.
7 M
3 (b) Attempt following:
1. Convert into Sum-of-Minterms : A' + B + CA
2. Convert into Product-of-Maxtems : A(A'+B)(C')
7 M
3 (c) Write a brief note on edge-triggered SR and JK Flip-Flops.
7 M
3 (d) Prove that:
1. ((AB'+ABC)' + A(B+AB'))' = 0
2. AB'C + A'BC + ABC = AC + AB
7 M

4 (a) Design a sequential circuit using JK Flip-Flops and two states Q0 and Q1 such that,
1. It moves to the next state for input 0. (00 to 01, 01 to 10,..., 11 to 00)
2. It moves to the previous state for input 1. (reverse from the above mentioned steps)
9 M
4 (b) Write a brief note on parity checker/generator.
5 M
4 (c) Design and Implement a Mod-10 asynchronous counter with T FF.
7 M
4 (d) Design a circuit for 4-bits parallel register with load with D Flip-Flops. Load input decides whether to load new input or to apply no change conditions.
7 M

5 (a) Discuss hard-wired vs. micro-programmed control unit.
7 M
5 (b) Write a note on Binary Ripple Counter.
7 M
5 (c) Write a note on Master-Slave Flip-Flop.
7 M
5 (d) Design a 4-to-16 decoder by using only 2-4 decoder circuits
7 M



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