MU Instrumentation Engineering (Semester 3)
Digital Electronics
December 2015
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


Answer the following (any Four):
1 (a) Convert:
i) (77)8→(?)10
ii) (111010110000111)2→ (?)16
5 M
1 (b) Explain the working of SR Flip-Flop. What is mean by edge triggering?
5 M
1 (c) Design half adder using logic gates.
5 M
1 (d) Explain the function of CMOS Inverter.
5 M
1 (e) Determine the value of x, (193)x=(623)8.
5 M

Perform the following:
2 (a) (i) 96-78 using 2's complement.
2 M
2 (a) (ii) Add BCD 87+96.
2 M
2 (a) (iii) Subtract BCD 13-06.
2 M
2 (a) (iv) (1101)Binary → (?)gray.
2 M
2 (a) (v) (89 A)16 = (?)2.
2 M

3 (a) Simplify using boolean laws and Implement using logic gates. \[ i) \ f=\overline A \overline B C + \overline A \overline B D+BD+BC \ ii) \ f=AB+\overline AC+BC
10 M
3 (b) Simplify following using k-map and implement using logic gates.
f∑(2,5,7,15)+d(6,9,13).
10 M

4 (a) Design an adder to add two BCD numbers using four bit binary IC 7483 chips and necessary gates.
10 M
4 (b) Convert D flip flop to T-flip flop.
5 M
4 (c) Draw and explain the function of Ring counter.
5 M

5 (a) Design MOD-12 asynchronous ripple counter.
10 M
5 (b) Explain the operation of 4-bit bidirectional shift register with neat diagram.
10 M

Write short note on (Any Four):
6 (a) De Morgan's Theorem.
5 M
6 (b) FPGA
5 M
6 (c) DEMUX
5 M
6 (d) ASCII Codes
5 M
6 (e) ALU
5 M
6 (f) PAL and PLA.
5 M



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