Answer any one question from Q1 and Q2
1 (a)
Draw and explain Von Neumann architecture.
6 M
1 (b)
Explain basic SOC (System on Chip) processor architecture.
6 M
2 (a)
Describe the features of RISC and CICS processors.
6 M
2 (b)
Multiply the following numbers using Booth's algorithm:
Multiplicand = +13
Multiplier = ?6 (Show steps in detail).
Multiplicand = +13
Multiplier = ?6 (Show steps in detail).
6 M
Answer any one question from Q3 and Q4
3 (a)
Explain hardware organization and execution of 4 stage instruction Pipeline.
6 M
3 (b)
State Microinstructions for Add (Rscr)+, Rdst.
6 M
4 (a)
Explain with example the steps involved in floating point addition and multiplication.
6 M
4 (b)
Compare hardwired and micro programmed control unit.
6 M
Answer any one question from Q5 and Q6
5 (a)
Compare memory mapped I/O with I/O mapped I/O.
6 M
5 (b)
Explain how data transfer takes place by USB.
7 M
6 (a)
Compare NUMA and UMA multiprocessors.
6 M
6 (b)
Explain how data transfer takes place by SCSI Bus.
7 M
Answer any one question from Q7 and Q8
7 (a)
Draw the block diagram of AMD multicore Opteron.
6 M
7 (b)
Draw NVDIA GPU architecture.
7 M
8
Explain with diagram Intel IA-64 architecture.
13 M
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