Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1(a) List the steps needed to execute the machine instruction given below in terms of transfers between the components of processor, memory and some control commands. ADD LOCA, R0. Assume the instruction is stored in memory location 'INSTR'.
5 M
1(b) Perform the following operations on the 5-bit signed numbers using 2's complement representation system. Further indicate whether overflow has occurred.
i) (-10) + (-13) ii) (-10) - (+4) iii) (+7) - (-15) iv) (+8) + (+10).
10 M
1(c) Write the basic performance equation. Explain the role of each of the parameters in the equation on the performance of the computer.
5 M

2(a) Define addressing mode and explain any four addressing modes with an exampl for each.
9 M
2(b) What is subroutine linkage? With examples explain different ways of passing parameters to subroutine.
6 M
2(c) Explain in detail encoding of machine instruction into 32-bit words. Assume that there are 16 registers in the processor.
5 M

3(a) Define interrupt. What are the overhead incurred in handling interrupts?
4 M
3(b) With neat sketches explain a method for handling interrupts from multiple devices.
10 M
3(c) What is bus arbitration? With a neat diagram, explain any one approach used for bus arbitration.
6 M

4(a) With a block diagram, explain a general 8-bit parallel interface.
10 M
4(b) List out widely used bus standards in a computer system. Further, explain the READ operation using PCI bus with a timing diagram.
10 M

5(a) What is a cache? Explain any two cache mapping functions with neat sketches.
10 M
5(b) What is a virtual memory? With a neat diagram, explain the method for translating virtual address to physical address.
10 M

6(a) Explain the design of 4-bit carry-look ahead adder.
8 M
6(b) Multiply (+14) and (-6) using Booth's algorithm.
7 M
6(c) Perform the division of number 8 by 3 (8 ÷ 3) using restoring methods.
5 M

7(a) Write the sequence of control steps to execute the instruction, ADD (R3, R1 on single bus architecture.
7 M
7(b) With a block diagram, describe the organization of a micro programmed control unit.
10 M
7(c) Bring out the difference between micro programmed control and Hard-Wired control.
3 M

8(a) Explain any two shared memory multiprocessor models.
10 M
8(b) Briefly explain SISD and SIMD architectures with neat diagrams.
10 M



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