STUPIDSID
Attempt any four from the following
1(a)
At reset, interrupts in 8086 processor are disabled. Give reason.
5 M
1(b)
List the differences between 8086 and 8088 processor.
5 M
1(c)
Explain the features of pipelining and queue in 8086 processor.
5 M
1(d)
Explain the significance of HOLD, RESET and READy signals in 8086 processor.
5 M
1(e)
For 8086 op-code fetch machine cycle explain the significance of each T-state.
5 M
2(a)
Classify and explain 8086 instruction set.
10 M
2(b)
Explain programmable interrupt controller 8259 ' features and operation.
10 M
3(a)
Explain 8086-8087 coprocessor configuration in maximum mode of operation
10 M
3(b)
Explain th following 8086 instructions
a) CMPSb b) DIV AX c) LOOPE again d) REP SCASB e) XLATB
a) CMPSb b) DIV AX c) LOOPE again d) REP SCASB e) XLATB
10 M
4(a)
Write a detailed note on the interrupt structure of 8086 processor.
10 M
4(b)
Explain the need for DMA and modes of DMA data transfer.
10 M
5(a)
Explain the architecture of 8086 processor. What is the need for memory segmentation.
10 M
5(b)
With the help of neat flowchart/algorithm write a program in 8086 assembly to arrange a set of ten 8-bit numbers initialized in data segment in ascending order.
10 M
6(a)
Write a brief note on programmable peripheral interface (PPI) IC-8255 and its modes of operation.
10 M
6(b)
Using string instruction write a program in 8086 assembly to copy a block of ten bytes initialized in data segment to extra segment. Assume the necessary details.
10 M
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