1 (a)
What is H/w and S/w co-design.
5 M
1 (b)
Explain functions of different registers available in ARM 7.
5 M
1 (c)
Differentiate between Mutex, Lock() and Spinlock() interprocess communication techniques with suitable examples
5 M
1 (d)
Draw and explain data frame format of CAN bus.
5 M
2 (a)
Design an automatic tea and coffee vending machine on FSM (Finite State Machine) model for the following requirement: the tea/coffee vending is initiated by user entering a 5 rupee coin. After inserting the coin, the user can select coffee or tea or press cancel to cancel the order and take back the coin.
7 M
2 (b)
Draw and explain Petrinet model.
3 M
2 (c)
Name the different problems of using semaphore, also explain the priority inversion problem and its solution.
10 M
3 (a)
Draw and explain status register structure of MSP 430.
5 M
3 (b)
Explain different exceptions which occur in MSP430
5 M
3 (c)
Explain clock circuit and registers used to control it for MSP430.
10 M
4 (a)
Define process, threads and tasks also explain various states of task.
10 M
4 (b)
What is shared data problem and mention various methods to resolve it? Give relevant examples.
10 M
5 (a)
Explain processor modes of ARM7 , also specify different branch instruction used to exchange branch from ARM mode to THUMB mode.
10 M
5 (b)
Explain addressing modes of ARM7TDMI.
10 M
6 (a)
Three tasks with ids T1, T2, T3 with estimated time 10,5, 7 ms and priority 1,2,3 respectively enters to ready queue together. A new process with estimated time 2 ms and priority 0, enters the queue after 2 ms. Schedule the tasks using preemptive SJF (Shortest Job First) and priority based scheduling algorithm. Calculate execution time, waiting time, turnaround time, mention which is the best scheduling algorithm for a given problem. (0 is the highest priority)
10 M
6 (b)
Explain data structures queue, circular queue, Linked list, Array.
10 M
Write short notes on any four:-
7 (a)
Explain System on Chip (SoC).
5 M
7 (b)
Spiral model used in EDLC.
5 M
7 (c)
Periodic and Aperiodic rate monotonic scheduling.
5 M
7 (d)
Black box and white box testing .
5 M
7 (e)
SPI and SCI port.
5 M
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