Answer any four:
1 (a)
Distinguish between dual access RAM and single access RAM used in
on-chip memory of 5X
5 M
1 (b)
How a higher throughput is obtained using VLIW architecture? Give an
example of DSP that has VLIW architecture
5 M
1 (c)
Explain briefly the main features of programmable DSPs.
5 M
1 (d)
Explain the six staged pipeline execution of TMS32oC5-1XX.
5 M
1 (e)
Differentiate between MAC and MACD instruction by giving suitable Example.
5 M
2 (a)
Explain the organization of signal samples and filter coefficients in circular buffers for FIR filter implementation. Which memory mapped registers control the circular buffer operation?
10 M
2 (b)
With the help of neat block diagram explain ALU of a DSP system
6 M
2 (c)
Explain the purpose of a program sequencer.
4 M
3 (a)
Explain on-chip peripherals of TMS320C5X
10 M
3 (b)
Explain with examples any four data addressing modes of TMS320c54xx
processo
10 M
4 (a)
Describe the multiplier/adder unit of TMS320cc54xx processor with a neat block diagram
6 M
4 (b)
Explain PMST register
8 M
4 (c)
Explain the functioning of barrel shifter in TMS320C54XX processor
6 M
5 (a)
Explain the architecture of ADSP21XX with the help at functional block diagram
10 M
5 (b)
Explain the features of TMS320C6X processor and compare the same with TMS320C54XX processor
10 M
6 (a)
With the help of neat diagram, explain CSSU of TMS320C54X
10 M
6 (b)
Write an assembly language program which initializes the registers to the values given in above Table using:
(i) Absolute addressing (ii) Direct addressing using DP
(iii) Direct addressing using SP
(iv) Indirect addressing with AR2. AR3 as memory address pointers.
A | B | DP | SP | 1020 | 1125 |
45 h | 33 h | 20 h | 1105 h | 33 | 23 |
Write an assembly language program which initializes the registers to the values given in above Table using:
(i) Absolute addressing (ii) Direct addressing using DP
(iii) Direct addressing using SP
(iv) Indirect addressing with AR2. AR3 as memory address pointers.
10 M
7 (a)
Explain
(i) Bit reversal addressing (ii) Parallelism
(iii) Guard bits.
(i) Bit reversal addressing (ii) Parallelism
(iii) Guard bits.
6 M
7 (b)
Identify the addressing modes of the operands in each of the following instructions and their operation.
(i) ADD B
(ii) ADD #1234H
(iii) ADD 567 8H
(iv) ADD +*ADDRREG
(i) ADD B
(ii) ADD #1234H
(iii) ADD 567 8H
(iv) ADD +*ADDRREG
8 M
7 (c)
Write note on real-time application of PDSPs.
6 M
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