1 (a)
Justify: In impulse invariance transformation method there is many to one mapping of poles from s-plane to z-plane.

5 M

1 (b)
Find the number of computations required to compute 32 point DFT using direct calculation and by using FFT algorithm. Also find the computational complexity.

5 M

1 (c)
Compare DSP processor and microprocessor.

5 M

1 (d)
Compare fixed point arithmetic and floating point arithmetic.

5 M

2 (a)
Find the DFT of the following sequence using Radix 3 DIF FFT algorithm

x(n)={1, 2, 3, 4, 4, 3, 2, 1}

x(n)={1, 2, 3, 4, 4, 3, 2, 1}

10 M

2 (b)
Compute the circular convolution of the sequence using DFT and IDFT approach

x

x

x

_{1}(n)={1, 2, 0}x

_{2}(n) = {2, 2, 1, 1}
10 M

3 (a)
Design a Low pass FIR filter with 11 coefficients for the following specifications. Passband frequency edge = 0.25 KHz and sampling frequency=1KHz.

Use rectangular window in the design.

Use rectangular window in the design.

10 M

3 (b)
Explain frequency sampling method of designing FIR filter.

10 M

4 (a)
Use bilinear transformation to obtain a digital filter of notch frequency 75Hz and sampling frequency of 200Hz, for a given normalized second order filter having transfer function \( H(S) = \dfrac {S^2 +1}{S^2 + S+1} \)

10 M

4 (b)
Design a Butterworth lowpass filter to meet the following specifications.

Passband gain = 0.89

Passband frequency edge = 30Hz.

Attenuation = 0.20.

Stopband edge = 75Hz.

Passband gain = 0.89

Passband frequency edge = 30Hz.

Attenuation = 0.20.

Stopband edge = 75Hz.

10 M

5 (a)
Explain with neat diagram architecture of TMS320C67XX DSP processor.

10 M

5 (b)
Explain the applications of the DSP processor in following fields.

i) Radar signal processing.

ii) Speech recognition.

i) Radar signal processing.

ii) Speech recognition.

10 M

6 (a)
Draw the quantization noise model for second order system \[ H(z) = \dfrac {1}{1-2r\cos \theta z^{-1} + r^2 z^{-2}} \] find the steady state output noise variance.

10 M

Explain the following terms.

6 (b) (i)
Dead band

3 M

6 (b) (ii)
Limit cycle oscillations.

3 M

6 (b) (iii)
Addressing modes of TMS320C67XX processor.

4 M

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