SPPU Computer Engineering (Semester 6)
Digital Signal Processing Applications
June 2015
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


Answer any one question from Q1 and Q2
1 (a) Define two standard signals u(n) and δ(n). Show that \[u (n)= \sum^\infty_{k=0} \delta (n-k) \] by means of convolution operation.
5 M
1 (b) State Periodicity and Symmetry property of DFT. How can we compute N point Circular Convolution using DFT and IDFT?
5 M

2 (a) Perform following circular shifting operations on a given DT signal x(n)={1,2,3,4} with N=5 and N=6
i) x((n-3))N
ii) x((n+2))N
5 M
2 (b) Discuss the form of an Nth order difference equation used to describe a DT system. How can it be expressed as an FIR and IIR system?
5 M

Answer any one question from Q3 and Q4
3 (a) Derive the first stage of DIT FFT algorithm. How the computational efficiency is improved in FFT algorithm?
5 M
3 (b) Obtain the Z Transform of sequence x(n) = anu(-n-1) and sketch the ROC.
5 M

4 (a) How can we compute Linear Convolution using N point Circular Convolution?
5 M
4 (b) Define system function H(z). Obtain it from the Nth order difference equation and express it for All Pole and All Zero System.
5 M

Answer any one question from Q5 and Q6
5 (a) What are filter structures? Explain how the Direct and Cascade form of FIR filters are obtained and realized from the system function H(Z).
9 M
5 (b) A DT System described by means of system function H(z) is given by- \[ H(Z)= 3+\dfrac {4Z}{Z-1} - \dfrac {2}{Z-1/4} \] obtain and Draw Direct Form-I and Direct Form-II IIR filter structure.
9 M

6 (a) Obtain and realize Linear Phase FIR filter structure for a DT system. \[ H(Z) = \left ( 1 + \dfrac {1}{2} Z^{-1}+ Z^{-2} \right )\left ( 1+ \dfrac {1}{4}Z^{-1}+Z^{-2} \right ) \] What are the advantages of this filter structure?
9 M
6 (b) Derive the Direct Form-II IIR filter structure from system function H(Z) and represent it using multipliers, adders and delay elements.
9 M

Answer any one question from Q7 and Q8
7 (a) Draw the block diagram of basic DSP processor. What are the common features of DSP processor?
8 M
7 (b) Explain how SHARC DSP processor supports the multiprocessing capabilities. Give details about different types of ports used for multiprocessing.
8 M

8 (a) What is OMAP? Explain the Hardware architecture of OMAP in brief.
8 M
8 (b) Compare between Harvard and Super Harvard Architecture of DSP Processor. List the number of DAGs and supporting memory pointer registers of SHARC DSP Processor.
8 M

Answer any one question from Q9 and Q10
9 (a) Explain the following terms associated with audio processing:
i) Timbre
ii) Loudness
iii) Pitch
8 M
9 (b) What is image enhancement in digital image processing? Explain any two gray level transforms used for image enhancement.
8 M

10 (a) What do you mean by Speech Synthesis and Recognition? Draw and explain Human Speech Model in brief.
8 M
10 (b) Explain the operation of CCD (Charge Coupled Device) used in electronic cameras.
8 M



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