MU Electronics Engineering (Semester 5)
Design with Linear Integrated Circuits
May 2016
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1(a) Explain behaviour of op-amp in linear and saturation region with neat graphs.
4 M
1(b) Explain non-inverting comparator with suitable exmaple.
4 M
1(c) State various methods to achiece analog to digital conversion.
4 M
1(d) Explain 78XX series voltage regulator.
4 M
1(e) Implement y = 3 va ' 5 vb + 7 vc using op-amp, where y is output and va, vb & vc are inputs.
4 M

2(a) Derive expression for voltage gain of inverting amplifier and hence design the same for voltege gain = 20.
10 M
2(b) Design a 2nd order KRC low pass filter with a cutoff frequency fo = 1KHz and Q = 5.
10 M

3(a) Draw the circuit diagram of an inverting type schmitt trigger circuit.
Design such a circuit to meet UTP = +2.5V & LTP = -1V
Assume ± vsat = ± 12V, for an input of 8sinwt, plot the graph of vo and vin.
10 M
3(b) Explain working of Wien bridge oscillator and hence design for fo = 5KHz.
10 M

4(a) Explain R/2R ladder type DAC
10 M
4(b) Design Mono stable multivibrator using IC 555 to generate output delay of 10 msec.
10 M

5(a) Design voltage regulator using IC 723 for Vo = 10V and IL = 200mA.
10 M
5(b) Explain internal diagram of power amplifier LM 380
10 M

Write short notes on
6(a) Sample and Hold circuit
5 M
6(b) V-I converter
5 M
6(c) Applications of IC 555
5 M
6(d) Switching mode voltage regulator
5 M



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