STUPIDSID
1 (a)
Draw the connection between processor and memory and mention the functions of each component in the connection.
8 M
1 (b)
Write the difference between RISC and CISC processors.
4 M
1 (c)
A program contain 1000 instruction Out of that 25% instructions requires 4 clock cycles. 40% instructions requires 5 clock and remaining 3 clock cycles for execution. Find the total time required to execute the program running in a 1GHz machine.
5 M
1 (d)
Add +5 and -9 2's compliment method.
3 M
2 (a)
Explain immediate, indirect and indexed addressing modes.
8 M
2 (b)
Explain different rotate instructions.
6 M
2 (c)
Write ALP program to copy 'N' numbers from array 'A' to array 'B' using direct addresses. (Assume A and B are the starting memory locations of a array).
6 M
3 (a)
Explain the following terms:
i) Interrupt service routine
ii) Interrupt latency
iii) Interrupt disabling.
i) Interrupt service routine
ii) Interrupt latency
iii) Interrupt disabling.
6 M
3 (b)
With a diagram, explain daisy chaining technique.
6 M
3 (c)
What you mean by bus arbitration? Briefly explain different bus arbitration techniques.
8 M
4 (a)
With a block diagram, explain how the printer is interfaced to processor.
8 M
4 (b)
Explain the architecture and addressing scheme of USB.
8 M
4 (c)
Define two types of SCSI controller.
4 M
5 (a)
Explain direct memory mapping technique.
6 M
5 (b)
What is virtual memory? With a diagram, explain how virtual memory address is translated.
8 M
5 (c)
Explain the working of 16 megabyte DRAM chip configured as 1M×16 memory chip.
6 M
6 (a)
Design 4 bit carry look ahead logic and explain how it is faster them 4 bit ripple adder.
8 M
6 (b)
Multiple 14×-8 using Booth's algorithm.
6 M
6 (c)
Explain normalization, access-exponent and special values with respect to IEEE floating point representation.
6 M
7 (a)
With a diagram, explain typical single bus processor data path.
8 M
7 (b)
Explain with neat diagram, the basic organization of a microprogrammed control unit.
8 M
7 (c)
Differentials hardwired and microprogrammed control unit.
4 M
8 (a)
Define and discuss Amdahl's law.
6 M
8 (b)
With a diagram, explain a shared memory multiprocessor architecture.
8 M
8 (c)
What is hardware multithreading? Explain the different approaches to hardware multithreading.
6 M
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