STUPIDSID
1 (a)
Explain the basic operational concepts between the processor and the memory.
8 M
1 (b)
How to measure the performance of the computer? Explain.
6 M
1 (c)
Write a note on byte addressability, big-endian and little-endian assignment.
6 M
2 (a)
What is an addressing mode? Explain any four types of addressing modes, with example.
8 M
2 (b)
With example, explain subroutine stack frame.
6 M
2 (c)
Explain how to encode the instructions into 32-bit words.
6 M
3 (a)
What is an interrupt? With example illustrate the concept of interrupts.
6 M
3 (b)
Explain in detail, the situations where a number of devices capable of initiating interrupts are connected to the processor? How to resolve the problems?
8 M
3 (c)
Explain the two approaches for bus arbitration.
6 M
4 (a)
Describe how a read operation is performed on a PCI bus.
10 M
4 (b)
List the sequence of events that takes place when a processor sends a commands to the SCSI controller.
10 M
5 (a)
Discuss the internal organization of a 2M×8 asynchronous DRAM chip.
10 M
5 (b)
Describe the different mapping functions in cache.
10 M
6 (a)
Write the logic diagram of 4-bit carry look ahead adder. Explain the operation.
6 M
6 (b)
Perform multiplication for -13 and +9 using Booth's algorithm.
6 M
6 (c)
Write the circuit arrangement for binary division. Perform the restoring division for the given binary numbers 100÷11, show all the cycles.
8 M
7 (a)
Explain the three-bus organization of the processor.
8 M
7 (b)
Discuss the organization of hardwired control unit.
8 M
7 (c)
Write the micro-routine for the instruction Add-(Rsrc), Rdst.
4 M
8 (a)
With a neat diagram, explain the organization of a shared memory multiprocessor.
8 M
8 (b)
What is hardware multithreading? Explain the different approaches to hardware multithreading.
8 M
8 (c)
Explain:
i) SISD
ii) MIMD
iii) SIMD
iv) SPMD
i) SISD
ii) MIMD
iii) SIMD
iv) SPMD
4 M
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