VTU Electronics and Communication Engineering (Semester 4)
Linear Integrated Circuits
June 2015
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Explain the working of a basic operational amplifier circuit with Rc=7.5 KΩ, RE=3.8 KΩ and powered by ±12V supply.
8 M
1 (b) Design a bias-current compensated inverting amplifier to amplify a dc input of 150 mV by a factor of 40. Use a bipolar op-amp with Iamax=500 mA.
6 M
1 (c) Derive an expression to relate the input and output common mode voltage (Vkm and Vocm) of a non-inverting amplifier.
6 M

2 (a) Explain the realization of a C-coupled voltage follower for AC amplifier applications, discussing cut off frequency design concept.
6 M
2 (b) Design a BIFET op-amp based high input impedance C-coupled non inverting amplifier for a lower cut off frequency of 120Hz. Given: Vin=20mV, V0=5V and RL min=10KΩ.
8 M
2 (c) Explain the concept and construction of a C-coupled inverting amplifier using a single-polarity supply (+ Vcc).
6 M

3 (a) Considering the frequency and phase response of an uncompensated op-amp with a three-stage model, discuss the concept of circuit stability.
10 M
3 (b) Explain frequency compensation based on Miller effect, also explaining the capacitance-amplification principle.
6 M
3 (c) A voltage follower is to operate at a unity gain bandwidth of 1 MHz, and the op-amp has a slew rate of 0.75 V/μs. Determine the permissible peak output voltage, and the cut-off frequency related rise time.
4 M

4 (a) Design a current source to produce an output of 150 mA to a grounded load of maximum value 30Ω. Use an op-amp with ±12V supply and a power MOSFET with RD-on=6Ω as the current booster.
8 M
4 (b) Derive an expression for the differential gain of an instrumentation amplifier.
6 M
4 (c) Explaining the operation briefly, design a non-saturating half wave precision rectifier to produce a 3 Volt peak output from an input of peak value 0.25 V, and frequency of 5 kHz. Use a bipolar op-amp with ±15V power supply.
6 M

5 (a) Explain the operation of a voltage follower peak detector circuit, discussing capacitor selection procedure.
8 M
5 (b) Design an RC phase shift oscillator to generate sustained oscillations at a frequency of 1.5 kHz. Use a 741 op-amp and K±12V power supply.
6 M
5 (c) Deriving an expression, discuss the fundamental log-amplifier circuit.
6 M

6 (a) Explain the operation of an inverting Schmitt trigger circuit with the help of waveforms and transfer characteristics.
8 M
6 (b) Design an op-amp based mono stable multi-vibrator to generate a pulse of width PW=2ms. The trigger is a pulse of amplitude 3V and duration 150μs. Use a bipolar op-amp and a supply of ±12V.
8 M
6 (c) Design a first order high pass active filter for a cut-off frequency of 2 kHz.
4 M

7 (a) Briefly explain the operation of a seris voltage regulator.
6 M
7 (b) Design a voltage regulator circuit using LM723 to obtain V0=5V and I0=2A.
6 M
7 (c) Explain the basic principle of operation of switching regulators. Also list any four merits.
8 M

8 (a) Design an astable multi-vibrator using 555 timer to obtain a square wave frequency 5 kHz at 50% duty cycle.
6 M
8 (b) Discuss the operating principle of PLLS and define the lock-in capture ranges.
8 M
8 (c) Explain the binary weighted technique of digital to analog conversion. What is its major disadvantage?
6 M



More question papers from Linear Integrated Circuits
SPONSORED ADVERTISEMENTS