MU Electronics Engineering (Semester 7)
IC Technology
December 2015
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


Solve any of the following:
1 (a) Explain pre-deposition and drive in steps in diffusion process.
5 M
1 (b) Classify and discuss in brief the types of Thin Film Deposition methods.
5 M
1 (c) What is Hall effect? Enlist Important electrical parameters for which measurement is required before device processing begins.
5 M
1 (d) Explain the need of isolation in VLSI and list the methods to accomplish it?
5 M
1 (e) Explain SOI fabrication using bonded SOI and smart cut method.
5 M

2 (a) Explain Czochralski methods for Silicon crystal growth. What are its advantages?
10 M
2 (b) What do you mean by Class of a clean room? Give the steps in a standards RCA cycle during wafer cleaning.
10 M

3 (a) Explain Solid source diffusion system with neat diagram. Also give one example of each source for P-type and N-type diffusion.
10 M
3 (b) Explain High K and low K dielectrics with applications of each.
5 M
3 (c) What are the basic reactions in formation of SiO2 in dry oxidation and wet oxidation? Explain where these methods are used during MOSFET fabrication process.
5 M

4 (a) Explain the fabrication process steps along with vertical cross-sectional views for CMOS inverter using N-well process.
10 M
4 (b) What are the different types of design rules? Draw layout of 2 input NAND gate as per lambda (λ) based design rules (Show units in lambda).
10 M

5 (a) Enlist important electrical parameters for which measurement is required before device processing begins. Also describe the experimental setup for the Four Probe method for resistivity measurement with the help of a neat diagram.
10 M
5 (b) Explain the difference between SOI Finfet and bulk Finfet?
3 M
5 (c) State advantages of Finfet devices over single gate MOSFET devices. Also draw cross-sectional views of different multigate structures.
7 M

Write short notes:
6 (a) MESFET Fabrication
5 M
6 (b) Carbon Nanotechnology Transistor
5 M
6 (c) SOI Technology
5 M
6 (d) Parametric tests and Functionality tests for IC testing.
5 M



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